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power driver for stepper motors integrated circuits tr inamic motion control gmbh & co. kg hamburg, germany tmc 5130 a - ta datasheet f eatures and b enefits 2 - phase stepper motors up to 2 a coil current (2.5a peak) motion controller with sixpoint ? ramp step/dir interface with microstep int erpolation microplyer? voltage range 4.75 46v dc spi & single wire uart encoder interface and 2x ref. - switch input highest resolution 256 microsteps per full step stealthchop? for extremely quiet operation and smooth motion s preadcycle? highly dynamic motor control chopper dcstep? load dependent speed control stallguard 2? high precision sensorless motor load detection coolstep? current control for energy savings up to 75% integrated current sense option passive b raking and freewheeling mode full protec tion & diagnostics compact size 9 x 9 mm 2 tqfp 48 package a pplications textile, sewing machines factory automation lab automation liquid handling medical office automation cctv, security atm, cash recycler pos pumps and valves heliostat controller d escription the tmc5130a is a high performance stepper motor controller and driver ic with serial communication interface s. it combines a flexible ramp generator for automatic target positioning with industries most advanced stepper motor driver. based on trinamics sophisticated steal thchop chopper, the driver ensures absolutely noiseless operation combined with maximum efficiency and best motor torque. high integration, high energy efficiency and a small form factor enable miniaturized and scalable systems for cost effective solutions . the complete solution reduces learning curve to a minimum while giving best performance in class . universa l high voltage controller/ driver for two - phase bipolar stepper motor. stealthchop? for quiet movement. integrated mosfets for up to 2 a motor current per coil . with step/dir interface and spi. b lock d iagram s p r e a d c y c l e s t e a l t h c h o p m o t i o n c o n t r o l l e r w i t h l i n e a r 6 p o i n t r a m p g e n e r a t o r d r i v e r t m c 5 1 3 0 p r o g r a m m a b l e 2 5 6 s t e p s e q u e n c e r p r o t e c t i o n & d i a g n o s t i c s r e f . s w i t c h e s u a r t s t a l l g u a r d 2 c o o l s t e p d c s t e p p o w e r s u p p l y c h a r g e p u m p a b n m o t o r e n c o d e r u n i t s t e p / d i r s t e p m u l t i p l y e r s p r e a d c y c l e s t e a l t h c h o p d a c r e f e r e n c e i r e f o p t i o n a l c u r r e n t s c a l i n g r e f e r e n c e s w i t c h p r o c e s s i n g i n t e r r u p t s p o s i t i o n p u l s e o u t p u t u a r t s i n g l e w i r e s p i t o m a s t e r s p i c l k c l k o s c i l l a t o r / s e l e c t o r
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 2 www.trinamic.com application examples: high voltage C multipurpose use the tmc 5130a scores with complete motion controlling features , integrated power stages , and power density . it offers a versatility that covers a wide spectrum of applications from battery powered systems up to embedded applications with 2 a motor current per coil . the tmc 5130a contains the complete intelligence which is required to drive a motor . receiving target position s the tmc 5130a manages motor movement . based on trinamics unique features stallguard2, coolstep, dcstep, spreadcycle, and stealthchop, the tmc 5130a optimizes drive performance . it trades off velocity vs. motor torque , optimizes energy efficiency , smoothnes s of the drive , and noiselessness. the small form factor of the tmc 5130a keeps costs down and allows for miniaturized layouts. extensive support at the chip, board, and software levels enables rapid design cycles and fast time - to - market with competitive pr oducts. high energy efficiency and reliability deliver cost savings in related systems such as power supplies and cooling. o rder c odes order code description size [mm 2 ] tmc 5130a - ta 1 - axis dcste p, coolstep, and stealthchop controller/driver; tqfp 48 9 x 9 tmc 5130 - ev al evaluation board for tmc 5130a two phase stepper motor controller/driver 85 x 55 startrampe baseboard for tmc 5130 - eval and further evaluation boards. 85 x 55 eselsbrcke c onnector board for plug - in evaluation board system. 61 x 38 an abn encoder interface with scaler unit and two reference switch inputs are used to control motor movement. a n application with 2 stepper motors is shown. additionally, the abn encoder interface and two reference switches can be used for each motor. a single c pu control s the whole system. the cpu - board and the controller / driver boards are highly economical and space saving. the tmc 5130 - eval is p art of trinamics universal evaluation board system which provides a convenient handling of the hardware as well as a user - friendly software tool for evaluation. the tmc5130 evaluation board system consists of three parts: startrampe (base board) , eselsbrc ke (connector board including several test points) , and tmc5 130 - eval. c p u t m c 5 1 3 0 a h i g h - l e v e l i n t e r f a c e s p i c p u h i g h - l e v e l i n t e r f a c e t m c 5 1 3 0 a t m c 5 1 3 0 a u p t o 2 5 5 t m c 5 1 3 0 c a n b e a d d r e s s e d . u a r t m i n i a t u r i z e d d e s i g n f o r o n e s t e p p e r m o t o r c o m p a c t d e s i g n f o r u p t o 2 5 5 s t e p p e r m o t o r s m e n c o d e r r e f . s w i t c h e s m m a d d r . a d d r . t m c 5 1 3 0 - e v a l e v a l u a t i o n b o a r d
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 3 www.trinamic.com table of contents 1 principles of operat ion ......................... 5 1.1 k ey c oncepts ................................ ................ 7 1.2 c ontrol i nterfaces ................................ ..... 7 1.3 s oftware ................................ ...................... 7 1.4 m oving and c ontrolling the m otor ........ 8 1.5 stealth c hop d river ................................ ..... 8 1.6 stall g uard 2 C m echanical l oad s ensing 8 1.7 cool s tep C l oad a daptive c urrent c ontrol ................................ ................................ ...... 9 1.8 dc s tep C l oad d ependent s peed c ontrol 9 1.9 e ncoder i nterface ................................ ....... 9 2 pin assign ments ................................ ......... 10 2.1 p ackage o utline ................................ ........ 10 2.2 s ignal d escriptions ................................ . 10 3 sample circuits ................................ .......... 13 3.1 s tandard a pplication c ircuit ................ 13 3.2 r educed n umber of c omponents ............. 14 3.3 i nternal rds on s ensing .......................... 14 3.4 e xternal 5v p ower s upply ...................... 15 3.5 p re - r egulator for r educed p ower d issipation ................................ .............................. 16 3.6 5v o nly s upply ................................ .......... 17 3.7 h igh m otor c urrent ................................ . 18 3.8 d river p rotect ion and eme c ircuitry ... 20 4 spi interface ................................ ................ 21 4.1 spi d atagram s tructure ......................... 21 4.2 spi s ignals ................................ ................ 22 4.3 t iming ................................ ......................... 23 5 uart single wire int erface ................ 24 5.1 d atagram s tructure ................................ . 24 5.2 crc c alculation ................................ ....... 26 5.3 uart s ignals ................................ ............ 26 5.4 a ddressing m ultiple s laves .................... 27 6 register mapping ................................ ....... 29 6.1 g eneral c onfiguration r egisters .......... 30 6.2 v elocity d ependent d river f eature c ontrol r egister s et ................................ ............. 33 6.3 r amp g enerator r egisters ....................... 35 6 .4 e ncoder r egisters ................................ ..... 40 6.5 m otor d river r egisters ........................... 42 7 stealthchop? ................................ .............. 51 7.1 t wo m odes for c urrent r egulation ...... 51 7.2 a utomatic s caling ................................ .... 52 7.3 v elocity b ased s caling ............................ 54 7.4 c ombining stealth c hop and spread c ycle 56 7.5 f lags in stealth c hop ................................ 57 7.6 f reewheeling and p as sive b raking ........ 58 8 spreadcycle and clas sic chopper ... 59 8.1 spread c ycle c hopper ................................ 60 8.2 c lassic c onstant o ff t ime c hopper ...... 63 8.3 r andom o ff t ime ................................ ...... 64 8.4 chop s ync 2 for q uiet 2 - p hase m otor .... 65 9 analog current contr ol ain ............. 66 10 selecting sense resi stors ............... 67 11 internal sen se resistors ................. 69 12 velocity based mode control ....... 71 13 driver diagnostic fl ags .................. 73 13.1 t emperature m easurement ....................... 73 13.2 s hort to gnd p rotection ....................... 73 13.3 o pen l oad d iagnostics ........................... 73 14 ramp generator ................................ ..... 74 14.1 r eal w orld u nit c onversion ................. 74 14.2 m otion p rofiles ................................ ........ 75 14.3 v elocity t hresholds ................................ . 77 14.4 r eference s witches ................................ .. 78 14.5 e xternal step/dir d river ...................... 79 15 stallguard2 load mea surement ... 80 15.1 t uning stall g uard 2 t hreshold sgt ..... 81 15.2 stall g uard 2 u pdate r ate and f ilter .... 83 15.3 d etecting a m otor s tall ......................... 83 15.4 h oming with stall g uard ......................... 83 15.5 l imits of stall g uard 2 o peration .......... 83 16 coolstep operation ............................. 84 16.1 u ser b enefits ................................ ............. 84 16.2 s etting up for cool s tep .......................... 84 16.3 t uning cool s tep ................................ ........ 86 17 step/dir interface ................................ 87 17.1 t iming ................................ ......................... 87 17.2 c hanging r esolution ............................... 88 17.3 micro p lyer s tep i nterpolator and s tand s till d etection ................................ ....................... 89 18 diag outputs ................................ ........... 90 18.1 step/dir m ode ................................ ......... 90 18.2 m otion c ontroller m ode ........................ 90 19 dcstep ................................ .......................... 92 19.1 u ser b enefits ................................ ............. 92 19.2 d esigning - i n dc s tep ................................ . 92 19.3 dc s tep i ntegration with the m otion c ontroller ................................ .............................. 93 19.4 s tall d etection in dc s tep m ode ............ 93 19.5 m easuring a ctual m otor v elocity in dc s tep o peration ................................ ................... 94 19.6 dc s tep with step/dir i nterface ........... 95
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 4 www.trinamic.com 20 sine - wave look - up table ................... 98 20.1 u ser b enefits ................................ ............. 98 20.2 m icroste p t able ................................ ........ 98 21 emergency stop ................................ ....... 99 22 abn incremental enco der interface ................................ .............................. 100 22.1 e ncoder t iming ................................ ....... 101 22.2 s etting the e ncoder to m atch m otor r esolution ................................ ............................ 101 22.3 c losing the l oop ................................ .... 102 23 dc motor or solenoid .................... 103 23.1 s olenoid o peration ............................... 103 24 quick configuration guide ......... 104 25 getting started ................................ .. 109 25.1 i nitialization e xamples ......................... 109 26 stand alone operation .................... 110 27 external reset ................................ ...... 113 28 clock oscillator and input ........ 113 28.1 u sing the i nternal c lock ...................... 113 28.2 u sing an e xternal c lock ....................... 114 28.3 c onsiderations on the f requency ........ 114 29 absolute maximum rat ings .......... 115 30 electrical character istics .......... 115 30.1 o peration al r ange ................................ . 115 30.2 dc and t iming c haracteristics ............ 116 30.3 t hermal c haracteristics ........................ 119 31 layout consideration s ................... 120 31.1 e xposed d ie p ad ................................ ...... 120 31.2 w iring gnd ................................ ............ 120 31.3 s upply f iltering ................................ ...... 120 31.4 l ayout e xample ................................ ....... 121 32 package mechanical d ata .............. 123 32.1 d imensional d rawings tqfp48 - ep ..... 123 32.2 p ackage c odes ................................ ......... 124 33 design philosophy ............................. 125 34 disclaimer ................................ ............... 125 35 esd sensitive device .......................... 125 36 table of figures ................................ .. 126 37 revision history ................................ . 128 38 references ................................ ............... 128
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 5 www.trinamic.com 1 principles of o peration the tmc 5130a motion controller and driver chip is an intelligent power component interfacing between cpu and stepper motor . all stepper motor logic is completely within the tmc 5130a . no software is required to control the motor C just provide target positions. the tmc 5130a offers a num ber of unique enhancements which are enabled by the system - on - chip integration of driver and controller. the sixpoint ramp generator of the tmc 5130a uses stealthchop, dcstep, coolstep, and stallguard2 automatically t o optimize every motor movement. t he t mc 5130a offers three basic m odes of operation : mode 1 : full featured motion controller & d river all stepper motor logic is completely within the tmc5130 a . no software is required to control the motor C just provide target positions. enable this mode by tyi ng low pin sd_mode. mode 2: step & direction d river an external high - performance s - ramp motion cont roller like the tmc4 361 or a central cpu generate s step & direction signals synchronized to other components like additional motors within the system. the t mc 5130a takes care of intelligent current and mode control and delivers feedback on the state of the motor. the microplyer automaticall y smoothens motion. leave open sd_mode and spi_mode. mode 3: simple step & direction d river the tmc 5130a positions the m otor based on step & direction signals. the microplyer automatically smoothens motion. no cpu interaction is required; configuration is done by hardware pins. basic standby current control can be done by the tmc 5130a . optional feedback signals allow erro r detection and synchronization . enable this mode by tying low pin spi_mode. f igure 1 . 1 tmc 5130a basic application block diagram with motion controller d i f f . t r a n c e i v e r h a l f b r i d g e 1 h a l f b r i d g e 2 + v m v s c u r r e n t c o m p a r a t o r 2 p h a s e s t e p p e r m o t o r n s s t e p p e r d r i v e r p r o t e c t i o n & d i a g n o s t i c s p r o g r a m m a b l e s i n e t a b l e 4 * 2 5 6 e n t r y d a c s t a l l g u a r d 2 ? c o o l s t e p ? x o a 1 o a 2 b r a s p r e a d c y c l e & s t e a l t h c h o p c h o p p e r v c c _ i o t m c 5 1 3 0 a s t e p p e r m o t o r d r i v e r / c o n t r o l l e r s p i i n t e r f a c e c s n s c k s d o / n a o s d i / n a i l i n e a r 6 p o i n t r a m p g e n e r a t o r r e f e r e n c e s w i t c h p r o c e s s i n g s t e p & d i r e c t i o n p u l s e g e n e r a t i o n r e f l m o t i o n c o n t r o l r e f r h a l f b r i d g e 1 h a l f b r i d g e 2 v s c u r r e n t c o m p a r a t o r d a c o b 1 o b 2 b r b c o n t r o l r e g i s t e r s e t s i n g l e w i r e i n t e r f a c e ( - t a p c k g o n l y ) c l k o s c i l l a t o r / s e l e c t o r 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p c p o c p i v c p 2 2 n 1 0 0 n s w n _ d i a g 0 s w _ s e l c l k _ i n i n t e r f a c e s w p _ d i a g 1 + v m 5 v o u t v s a 4 . 7 + v i o e n c o d e r u n i t a b n i n t & p o s i t i o n p u l s e o u t p u t d r v _ e n n d r v _ e n n g n d p g n d p g n d a f f f = 6 0 n s s p i k e f i l t e r t s t _ m o d e d c s t e p ? d i e p a d s p i ? s i n g l e w i r e u a r t o p t . e x t . c l o c k 1 0 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n i n t e r f a c e s e l e c t i o n ( - t a p a c k a g e o n l y ) o p t . i n t e r r u p t o u t r e f e r e n c e / s t o p s w i t c h e s o p t . d r i v e r e n a b l e r s r s e n c b e n c a e n c n i s e n s e i s e n s e i s e n s e i s e n s e + v m d a c r e f e r e n c e a i n _ i r e f i r e f i r e f i r e f s d _ m o d e s p i _ m o d e p u p u p u p u p d p d d p m d p u = 1 6 6 k p u l l u p r e s i s t o r t o v c c p d = 1 6 6 k p u l l d o w n r e s i s t o r t o g n d p d d = 1 0 0 k p u l l d o w n p m d = 5 0 k t o v c c / 2 p u p u p u p u p u = 1 6 6 k p u l l u p t o v c c p u o p t . p o s c o m p o u t l e a v e o p e n o p t i o n a l c u r r e n t s c a l i n g o p t i o n a l f o r i n t e r n a l c u r r e n t s e n s i n g . r r e f = 9 k 1 a l l o w s f o r m a x i m u m c o i l c u r r e n t . r s = 0 r 1 5 a l l o w s f o r m a x i m u m c o i l c u r r e n t ; u s e l o w i n d u c t a n c e s m d r e s i s t o r t y p e . t i e b r a a n d b r b t o g n d f o r i n t e r n a l c u r r e n t s e n s i n g r r e f 5 v o u t 2 r 2 4 7 0 n 2 r 2 a n d 4 7 0 n a r e o p t i o n a l f i l t e r i n g c o m p o n e n t s f o r b e s t c h o p p e r p r e c i s i o n v c c o p t i o n a l i n c r e m e n t a l e n c o d e r i n p u t s c o o l s t e p & s t e a l t h c h o p m o t o r d r i v e r
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 6 www.trinamic.com figure 1 . 2 tmc 5130a step/dir application diagram figure 1 . 3 tmc 5130a standalone driver application diagram d i f f . t r a n c e i v e r h a l f b r i d g e 1 h a l f b r i d g e 2 + v m v s c u r r e n t c o m p a r a t o r 2 p h a s e s t e p p e r m o t o r n s s t e p p e r d r i v e r p r o t e c t i o n & d i a g n o s t i c s p r o g r a m m a b l e s i n e t a b l e 4 * 2 5 6 e n t r y d a c s t a l l g u a r d 2 ? c o o l s t e p ? x s t e p m u l t i p l i e r m i c r o p l y e r o a 1 o a 2 b r a s p r e a d c y c l e & s t e a l t h c h o p c h o p p e r v c c _ i o t m c 5 1 3 0 a / t m c 2 1 3 0 s t e p p e r m o t o r d r i v e r s p i i n t e r f a c e c s n s c k s d o / n a o s d i / n a i s t e p c o o l s t e p & s t e a l t h c h o p m o t o r d r i v e r d i r h a l f b r i d g e 1 h a l f b r i d g e 2 v s c u r r e n t c o m p a r a t o r d a c o b 1 o b 2 b r b c o n t r o l r e g i s t e r s e t s i n g l e w i r e i n t e r f a c e ( - t a p c k g o n l y ) c l k o s c i l l a t o r / s e l e c t o r s w n _ d i a g 0 s w _ s e l c l k _ i n i n t e r f a c e s w p _ d i a g 1 + v i o i n t & p o s i t i o n p u l s e o u t p u t d r v _ e n n d r v _ e n n g n d p g n d p g n d a f f = 6 0 n s s p i k e f i l t e r t s t _ m o d e d c s t e p ? d i e p a d r s = 0 r 1 5 a l l o w s f o r m a x i m u m c o i l c u r r e n t ; u s e l o w i n d u c t a n c e s m d r e s i s t o r t y p e . t i e b r a a n d b r b t o g n d f o r i n t e r n a l c u r r e n t s e n s i n g s p i ? s i n g l e w i r e u a r t o p t . e x t . c l o c k 1 0 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n 1 0 0 n o p t . i n t e r r u p t o u t s t e p & d i r i n p u t o p t . d r i v e r e n a b l e r s r s d c e n d c i n d c o i s e n s e i s e n s e i s e n s e i s e n s e + v m d a c r e f e r e n c e a i n _ i r e f i r e f i r e f i r e f s d _ m o d e s p i _ m o d e p u p u p u p u p d p d d p m d p u = 1 6 6 k p u l l u p r e s i s t o r t o v c c p d = 1 6 6 k p u l l d o w n r e s i s t o r t o g n d p d d = 1 0 0 k p u l l d o w n p m d = 5 0 k t o v c c / 2 p u p u p u p u p u = 1 6 6 k p u l l u p t o v c c p u o p t . p o s c o m p o u t o p t i o n a l c u r r e n t s c a l i n g f s t a n d s t i l l c u r r e n t r e d u c t i o n l e a v e o p e n d c s t e p c o n t r o l t i e d c e n t o g n d i f d c s t e p i s n o t u s e d r r e f 5 v o u t o p t i o n a l f o r i n t e r n a l c u r r e n t s e n s i n g . r r e f = 9 k 1 a l l o w s f o r m a x i m u m c o i l c u r r e n t . 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p c p o c p i v c p 2 2 n 1 0 0 n + v m 5 v o u t v s a 4 . 7 1 0 0 n 2 r 2 4 7 0 n 2 r 2 a n d 4 7 0 n a r e o p t i o n a l f i l t e r i n g c o m p o n e n t s f o r b e s t c h o p p e r p r e c i s i o n v c c i n t e r f a c e s e l e c t i o n ( - t a p a c k a g e o n l y ) s t a t u s o u t ( o p e n d r a i n ) h a l f b r i d g e 1 h a l f b r i d g e 2 + v m v s c u r r e n t c o m p a r a t o r 2 p h a s e s t e p p e r m o t o r n s s t e p p e r d r i v e r p r o t e c t i o n & d i a g n o s t i c s s i n e t a b l e 4 * 2 5 6 e n t r y d a c x s t e p m u l t i p l i e r m i c r o p l y e r o a 1 o a 2 b r a s p r e a d c y c l e & s t e a l t h c h o p c h o p p e r v c c _ i o t m c 5 1 3 0 a / t m c 2 1 3 0 s t a n d a l o n e s t e p p e r m o t o r d r i v e r c o n f i g u r a t i o n i n t e r f a c e w i t h t r i s t a t e d e t e c t i o n c f g 0 c f g 1 c f g 3 c f g 2 s t e p s p r e a d c y c l e & s t e a l t h c h o p m o t o r d r i v e r d i r h a l f b r i d g e 1 h a l f b r i d g e 2 v s c u r r e n t c o m p a r a t o r d a c o b 1 o b 2 b r b c l k o s c i l l a t o r / s e l e c t o r d i a g 0 c l k _ i n i n t e r f a c e d i a g 1 + v i o d r v _ e n n g n d p g n d p g n d a f f = 6 0 n s s p i k e f i l t e r t s t _ m o d e d i e p a d r s = 0 r 1 5 a l l o w s f o r m a x i m u m c o i l c u r r e n t ; t i e b r a a n d b r b t o g n d f o r i n t e r n a l c u r r e n t s e n s i n g t r i s t a t e c o n f i g u r a t i o n ( g n d , v c c _ i o o r o p e n ) o p t . e x t . c l o c k 1 0 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n 1 0 0 n i n d e x p u l s e s t e p & d i r i n p u t r s r s d c o i s e n s e i s e n s e i s e n s e i s e n s e + v m d a c r e f e r e n c e a i n _ i r e f i r e f i r e f i r e f s d _ m o d e s p i _ m o d e t g t g t g t g p d d p m d t g = t o g g l e w i t h 1 6 6 k r e s i s t o r b e t w e e n v c c a n d g n d t o d e t e c t o p e n p i n p d d = 1 0 0 k p u l l d o w n p m d = 5 0 k t o v c c / 2 p u p u o p t i o n a l c u r r e n t s c a l i n g f s t a n d s t i l l c u r r e n t r e d u c t i o n l e a v e o p e n r r e f 5 v o u t o p t i o n a l f o r i n t e r n a l c u r r e n t s e n s i n g . r r e f = 9 k 1 a l l o w s f o r m a x i m u m c o i l c u r r e n t . 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p c p o c p i v c p 2 2 n 1 0 0 n + v m 5 v o u t v s a 4 . 7 1 0 0 n 2 r 2 4 7 0 n 2 r 2 a n d 4 7 0 n a r e o p t i o n a l f i l t e r i n g c o m p o n e n t s f o r b e s t c h o p p e r p r e c i s i o n v c c d r i v e r e r r o r c f g 4 t g c f g 5 t g d r v _ e n n _ c f g 6 t g c f g 6 c f g 3 o p t . d r i v e r e n a b l e i n p u t c f g 0 c f g 4 c f g 5 c f g 1 c f g 2 c f g 1 c f g 2 c f g 1 c f g 2
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 7 www.trinamic.com 1.1 key concepts the tmc 51 30a implements advanced features which are exclusive to trinamic products. these features contribute toward greater precision, greater energy efficiency, higher reliability, smoother motion, and cooler operation in many stepper motor applications. s tealth chop ? no - noise, h igh - precision chopper algorithm for inaudible motion and inaudible standstill of the motor. spreadcycle ? high - precision chopper algorithm for highly dynamic motion and absolutely clean current wave. dcstep? load dependent speed control. th e motor moves as fast as possible and never loses a step. stallguard2 ? sensorless stall detection and mechanical load measurement. coolstep ? load - adaptive current control reduc ing energy consumption by as much as 75%. microplyer ? microstep interpolator f or obtaining increased smoothness of microstepping when using the step/dir interface. in addition to these performance enhancements, trinamic motor drivers offer safeguards to detect and protect against shorted outputs, output open - circuit, overtemperature , and undervoltage conditions for enhancing safety and recovery from equipment malfunctions. 1.2 control interfaces the tmc 5130a supports both, an spi interface and a uart based single wire interface with crc checking. selection of the actual interface is done via the configuration pin sw_sel, which can be hardwired to gnd or vcc_io depending on the desired interface. 1.2.1 spi interface the spi interface is a bit - serial interface synchronous to a bus clock. for every bit sent from the bus master to the bus slave a nother bit is sent simultaneously from the slave to the master. communication between an spi master and the tmc 5130a slave always consists of sending one 4 0 - bit command word and receiving one 4 0 - bit status word. the spi command rate typically is a few com mands per complete motor motion . 1.2.2 uart interface the single wire interface allows differential operation similar to rs485 (using swiop and swion) or single wire interfacing (leaving open swion). it can be driven by any standard uart. no baud rate configura tion is required. 1.3 software from a software point of view the tmc 5130a is a peripheral with a number of control and status registers. most of them can eith er be written only or read only. s ome of the registers allow both read and write access. in case read - modify - write access is desired for a write only register, a shadow register can be realized in master software.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 8 www.trinamic.com 1.4 moving and controlling the motor 1.4.1 integrated motion controller the integrated 32 bit motion controller automatically drives the motor to target positions, or accelerates to target velocities. all motion parameters can be changed on the fly . t he motion controller recalculates immediately. a minimum set of configuration data consists of acceleration and deceleration values and the maximum motion ve locity. a start and stop velocity is supported as well as a second acceleration and deceleration setting. the integrated motion controller supports immediate reaction to mechanical reference switches and to the sensorless stall detection stallguard 2. benef its are: - flexible ramp programming - efficient use of motor torque for acceleration and deceleration allows higher machine throughput - immediate reaction to stop and stall conditions 1.4.2 s tep /d ir interface the motor can optionally be controlled by a step and dir ection input. in this case, the motion controller remains unused. active edges on the step input can be rising edges o r both rising and falling edges as controlled by another mode bit ( dedge ). using both edges cuts the toggle rate of the step signal in hal f, which is useful for communication over slow interfaces such as optically isolated interfaces. on each active edge, the state sampled from the dir input determines whether to step forward or back. each step can be a fullstep or a microstep, in which ther e are 2, 4, 8, 16, 32, 64, 128, or 256 microsteps per fullstep. a step impulse with a low state on dir increases the microstep counter and a high decreases the counter by an amount controlled by the microstep resolution. an internal table translates the co unter value into the sine and cosine values which control the motor current for microstepping. 1.5 stealthchop driver stealthchop is a voltage chopper based principle. it guarantees absolutely quiet motor s tandstill and silent sl ow motion, except for noise gen erated by ball bearings. stealthchop can be combined with classic cycle - by - cycle chopper mode s for best performance in all velocity ranges . two additional chopper modes are available: a traditional constant off - time mode and the spreadcycle mode . the c onst ant off - time mode provides high torque at highest velocity, while spreadcycle offers smooth operation and g ood power efficiency over a wide range of speed and load. spreadcycle automatically integrates a fast decay cycle and guarantees smooth zero crossing performance. the extremely smooth motion of stealthchop is beneficial for many applications. programmable microstep shapes allow optimizing the motor performance for low cost motors . benefits of using stealthchop : - significantly improved microstepping wit h low cost motors - motor runs smooth and quiet - absolutely no standby noise - reduced mechanical resonances yields improved torque 1.6 stallguard 2 C mechanical load sensing stallguard2 provides an accurate measurement of the load on the motor. it can be used for s tall detection as well as other uses at loads below those which stall the motor, such as coolstep load - adaptive current reduction. this gives more information on the drive allowing functions like sensorless homing and diagnostics of the drive mechanics.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 9 www.trinamic.com 1.7 c oolstep C load adaptive current control coolstep drives the motor at the optimum current. it uses the stallguard 2 load measurement information to adjust the motor current to the minimum amount required in the actual load situation. this saves energy and ke eps the components cool . benefits are: - energy efficiency power consumption decreased up to 75% - motor generates less heat improved mechanical precision - less or no cooling improved reliability - use of smaller motor less torque reserve required cheaper motor does the job figure 1 . 4 shows the efficiency gain of a 42mm stepper motor when using coolstep compared to standard operation with 50% of torque reserve. coolstep is enabled above 60rpm in the examp le. figure 1 . 4 energy efficiency with coolstep (example) 1.8 dcstep C load dependent speed control dcstep allows the motor to run near its load limit and at its velocity limit without losing a step . if the mechanical load on the motor increases to the stalling load , the motor automatically decreases velocity so that it can still drive the load. with this feature, the motor will never stall. in addition to the increased torque at a lowe r velocity, dynamic inertia will allow the motor to overcome mechanical overloads by decelerating. dcstep directly integrates with the ramp generator, so that the target position will be reached, even if the motor velocity needs to be decreased due to incr eased mechanical load. a dynamic range of up to factor 10 or more can be covered by dcstep without any step loss. by optimizing the motion velocity in high load situations, this feature further enhances overall system efficiency. benefits are: - motor does n ot loose steps in overload conditions - application works as fast as possible - highest possible acceleration automatically - highest energy efficiency at speed limit - highest possible motor torque using fullstep drive - cheaper motor does the job 1.9 encoder interface the tmc 5130a provides an encoder interface for external in cremental encoders. the encoder can be used for homing of the motion controller (alternatively to reference switches ) and for consistency checks on - the - fly between encoder position and ramp generat or position. a programmable pre scaler allows the adaptation of the encoder resolution to the motor resolution. a 32 bit encoder counter is provided. 0 0 , 1 0 , 2 0 , 3 0 , 4 0 , 5 0 , 6 0 , 7 0 , 8 0 , 9 0 5 0 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 e f f i c i e n c y v e l o c i t y [ r p m ] e f f i c i e n c y w i t h c o o l s t e p e f f i c i e n c y w i t h 5 0 % t o r q u e r e s e r v e
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 10 www.trinamic.com 2 pin assignments 2.1 package outline figure 2 . 1 tmc 5130a - ta package and pinning tqfp - ep 48 (7x7mm body, 9x9mm with leads) 2.2 signal descriptions pin number type function tst_mode 1 di test mode input. tie to gnd using short wire. clk 2 di clk input. tie to gnd using short wire for internal clock or supply external clock. csn_cfg3 3 di (tpu) spi chip select input (negative active) (spi_mode=1) or c onfiguration input (spi_mode=0) (tristate detection) . sck_cfg2 4 di (tpu) spi serial clock input (spi_mode=1) or c onfiguration input (spi_mode=0) (tristate detection) . sdi_nai_ cfg1 5 di (tpu) spi data input (spi_mode=1) or c onfiguration input (spi_mode=0) (tristate detection) or n ext address input for single wire interface . n.c. 6 , 31, 36 unused pins; connect to gnd for compatibility to futu re versions. sdo_nao_ cfg0 7 di o (tpu) spi data output (tristate) (spi_mode=1) or c onfiguration input (spi_mode=0) (tristate detection) or n ext address output for single wire interface . 2 5 2 6 3 7 2 4 s w s e l - o a 2 o a 1 - v s - b r a - v c p r e f l _ s t e p c l k - o b 1 e n c b _ d c e n _ c f g 4 b r b o b 2 e n c n _ d c o 1 t s t _ m o d e r e f r _ d i r v c c _ i o s d o _ n a o _ c f g 0 s d i _ n a i _ c f g 1 s c k _ c f g 2 c s n _ c f g 3 s w p _ d i a g 1 s w n _ d i a g 0 a i n _ i r e f g n d a c p o - s d _ m o d e - v s a - 2 3 4 5 6 7 8 9 1 0 1 1 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 d r v _ e n n _ c f g 6 3 8 g n d p 1 3 c p i v c c 5 v o u t p a d = g n d d 1 2 s p i _ m o d e - v s - e n c a _ d c i n _ c f g 5 - - g n d p t m c 5 1 3 0 a - t a t q f p - 4 8 9 m m x 9 m m
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 11 www.trinamic.com pin number type function refl_step 8 di left reference input ( spi_mode=1 , sd_mode=0 ) or ste p input when ( sd_mode=1 or spi_mode=0 ) . refr_dir 9 di right reference input ( spi_mode=1 , sd_mode=0 ) or dir input ( sd_mode=1 or spi_mode=0 ) . vcc_io 10 3.3v to 5v io supply voltage for all digital pins. sd_mode 11 di (pu) mode selection input with pullup resistor. when tied low, the internal ramp generator generates step pulses. when tied high, the step/dir inputs control the driver. integrated pullup resistor. spi_mode 12 di (pu) mode selection input with pullup resistor. when tied low, the chip is in s tandalone mode and pins have their cfg functions. when tied high, the spi or uart interface s are available for control. integrated pullup resistor. gndp 13 , 48 power gnd. connect to gnd plane near pin. dnc. 14, 16, 18, 20, 22, 41, 43, 45, 47 do not con nect these pins. provided to increase creeping distance on pcb in order to allow higher supply voltage without coating. ob1 15 motor coil b output 1 brb 17 sense resistor connection for coil b. place sense resistor to gnd near pin. an additional 100nf capacitor to gnd (gnd plane) is recommended for best performance. ob2 19 motor coil b output 2 vs 21, 40 motor supply voltage. provide filtering capacity near pin with short loop to nearest gndp pin (respectively via gnd plane). encn_dco 23 dio encode r n - channel input (sd_mode=0) or dcstep ready output ( sd_mode=1 ) . with sd_mode=0, pull to gnd or vcc_io, if the pin is not used. encb_dcen_ cfg4 24 di (tpu) encoder b - channel input (sd_mode=0, spi_mode=1) or d cstep enable input ( sd_mode=1 , spi_mode=1) - tie to gnd for normal operation (no dcstep) . c onfiguration input (spi_mode=0) (tristate detection) enca_dcin_ cfg5 25 di (tpu) encoder a - channel input (sd_mode=0, spi_mode=1) or dcstep gating input for axis synchronization (sd_mode=1, spi_mode=1) or c onf iguration input (spi_mode=0) (tristate detection) . swn_diag0 26 dio d iagnostics output diag0. interrupt or step output for motion controller (sd_mode=0, spi_mode=1) . use external pullup resistor with 47k or less in open drain mode. single wire i/o (nega tive) (only with swsel=1) swp_diag1 27 dio d iagnostics output diag1. position compare or dir output for motion controller (sd_mode=0, spi_mode=1) . use external pullup resistor with 47k or less in open drain mode. single wire i/o (positive) ( only with sws el=1) swsel 2 8 di (pd) single wire interface select input, tie high for use of single wire interface (only when spi_mode=1). integrated pull - down resistor. drv_enn_ cfg6 29 di (tpu) enable input or configuration / enable input . the power stage becomes sw itched off (all motor outputs floating) when this pin becomes driven to a high level. ain_iref 30 ai analog reference voltage for current scaling (optional mode) or reference current for use of internal sense resistors gnda 32 analog gnd. tie to gnd pla ne.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 12 www.trinamic.com pin number type function 5vout 33 output of internal 5v regulator. attach 2.2f or larger ceramic capacitor to gnda near to pin for best performance. output to supply vcc of chip. vcc 34 5v supply input for digital circuitry within chip and charge pump. attach 470nf capac itor to gnd (gnd plane). may be supplied by 5vout. a 2.2 or 3.3 ohm resistor is recommended for decoupling noise from 5vout. when using an external supply, make sure, that vcc comes up before or in parallel to 5vout or vcc_io, whichever comes up later! cp o 35 charge pump capacitor output. cpi 37 cha rge pump capacitor in put. tie to cpo using 22nf 50v capacitor. vcp 38 cha rge pump voltage . tie to vs using 100nf capacitor. vsa 39 analog supply voltage for 5v regulator. normally tied to vs. provide a 10 0nf filtering capacitor. oa2 42 motor coil a output 2 bra 44 sense resistor connection for coil a. place sense resistor to gnd near pin. an additional 100nf capacitor to gnd (gnd plane) is recommended for best performance. oa1 46 motor coil a output 1 exposed die pad - connect the exposed die pad to a gnd plane. provide as many as possible vias for heat transfer to gnd plane. serves as gnd pin for digital circuitry. *(pu) denominates a pin with pullup resistor ; (tpu) denominates a pin with pullup resistor or toggle detection. toggle detection is active in standalone mode, only (spi_mode=0)
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 13 www.trinamic.com 3 sample circuits the sample circuits show the connection of external components in different operation and supply modes. the connection of the bus interface a nd further digital signals is left out for clarity. 3.1 standard application circuit figure 3 . 1 standard a pplication c ircuit the standard application circuit uses a minimum set of add itional components. two sense resistors set the motor coil current. see chapter 10 to choose the right sense resistors. use low esr capacitors for filtering the power supply . the capacitors need to cope with the current ripple cause by chopper operation. a minimum capacity of 100f near the driver is recommended for best performance. c urrent ripple in the supply capacitors also depends on the power supply internal resistance and cable length. vcc_io can be supplied from 5vout, o r from an external source, e.g. a low drop 3.3v regulator. in order to minimize linear voltage regulator power dissipation of the internal 5v voltage regulator in applications where vm is high, a different (lower) supply voltage can be used for vsa, if ava ilable. for example, many applications provide a 12v supply in addition to a higher driver supply voltage. using the 12v supply for vsa rather than 24v will reduce the power dissipation of the internal 5v regulator to about 37% of the dissipation caused by supply with the full motor voltage. basic l ayout hints place sense resistors and all filter capacitors as close as possible to the related ic pins. use a solid common gnd for all gnd connections, also for sense resistor gnd. connect 5vout filtering capac itor directly to 5vout and gnda pin. see layout hints for more details. low esr electrolytic capacitors are recommended for vs filtering. v c c _ i o t m c 5 1 3 0 a s p i i n t e r f a c e c s n s c k s d o / n a o s d i / n a i r e f e r e n c e s w i t c h p r o c e s s i n g r e f l / s t e p r e f r / d i r d i a g / i n t o u t a n d s i n g l e w i r e i n t e r f a c e 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p 2 2 n 6 3 v 1 0 0 n 1 6 v s w n / d i a g 0 s w _ s e l c l k _ i n s w p / d i a g 1 + v m 5 v o u t v s a 4 . 7 + v i o d r v _ e n n g n d p g n d a t s t _ m o d e d i e p a d v c c o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n c o n t r o l l e r f u l l b r i d g e a f u l l b r i d g e b + v m v s s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 1 0 0 n b r b 1 0 0 f c p i c p o + v i o b r a r s a u s e l o w i n d u c t i v i t y s m d t y p e , e . g . 1 2 0 6 , 0 . 5 w r s b 1 0 0 n v c p o p t i o n a l u s e l o w e r v o l t a g e d o w n t o 6 v 2 r 2 4 7 0 n d a c r e f e r e n c e a i n _ i r e f i r e f u s e l o w i n d u c t i v i t y s m d t y p e , e . g . 1 2 0 6 , 0 . 5 w e n c o d e r u n i t a b n e n c b e n c a e n c n o p t i o n a l i n c r e m e n t a l e n c o d e r i n p u t s s d _ m o d e s p i _ m o d e l e a v e o p e n o p t . d r i v e r e n a b l e
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 14 www.trinamic.com attention in case vsa is supplied by a different voltage source, make sure that vsa does not exceed vs by more than one diode drop upon power up or power down. 3.2 reduced number of components figure 3 . 2 reduced number of filtering components the standard application circuit uses rc filtering to de - couple the output of the internal linear regulator from high frequency ripple cause d by digital circuitry supplied by the vcc input. for cost sensitive applications, the rc - filtering on vcc can be eliminated. this leads to more noise on 5vout caused by op eration of the charge pump and the internal digital circuitry. there is a slight impact on microstep vibration and chopper noise performance . 3.3 internal rdson sensing for cost critical or space limited applications, sense resistors can be omitted. for intern al current sensing, a reference current set by a tiny external resistor programs the output current. for calculation of the reference resistor, refer chapter 11 . figure 3 . 3 rdson based sensing eliminates high current sense resistors 5 v v o l t a g e r e g u l a t o r + v m 5 v o u t v s a 4 . 7 v c c 1 0 0 n o p t i o n a l u s e l o w e r v o l t a g e d o w n t o 6 v f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r b r b b r a d a c r e f e r e n c e a i n _ i r e f i r e f a i n _ i r e f 5 v o u t r r e f
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 15 www.trinamic.com 3.4 external 5v power supply when an external 5v power supply is available, the power dissipation caused by the internal linear regulator can be eliminated. this especially is beneficial in high voltage applications, and when thermal conditions are critical. there are two options for using an external 5v source : e ither the external 5v source is used to support the digital supply of the driver by supplying the vcc pin , or the co mplete internal voltage regulator becomes bridged and is replaced by the external supply voltage. 3.4.1 support for the vcc s upply this scheme uses an external supply for all digital circuitry within the driver ( figure 3 . 4 ). as the di gital circuitry makes up for most of the power dissipation, this way the internal 5v regulator sees only low remaining load. the precisely regulated voltage of the internal regulator is still used as the reference for the motor current regulation as well a s for supplying internal analog circuitry. when cutting vcc from 5vout , make sure that the vcc supply comes up before or synchronously with the 5vout supply to ensure a correct power up reset of the internal logic. a simple schematic uses t wo diodes formi ng an or of the internal and the external power supplies for vcc. in order to prevent the chip from drawing part of the power from its internal regulator, a low drop 1a schottky diode is used for the external 5v supply path , while a silicon diode is used f or the 5vout path . an enhanced solution uses a dual pnp transistor as an active switch. it minimizes voltage drop and thus gives best performance. in certain setups, switching of vcc voltage can be eliminated. a third variant uses the vcc_io supply to ensu re power - on reset . this is possible, if vcc_io c om es up synchronously with or delayed to vcc. use a linear regulator to generate a 3.3v vcc_io from the external 5v vcc source. th is 3.3v regulator will cause a certain vol tage drop. a voltage drop in the reg ulator of 0.9v or more (e.g. ld 1117 - 3.3) ensures that the 5v supply already has exceeded the lower limit of about 3. 0 v once the reset conditions ends . the reset condition ends earliest, when vcc_io exceeds the undervoltage limit of minimum 2.1v . make sure that the power - down sequence also is safe . undefined states can result when vcc drops well below 4v without safely triggering a reset condition. triggering a reset upon power - down can be ensured when vsa goes down synchronously with or before vcc . figure 3 . 4 using an external 5v supply for digital circuitry of driver (different options) 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 1 0 0 n 4 7 0 n + 5 v l l 4 4 4 8 m s s 1 p 3 + v m 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 1 0 0 n + 5 v + v m v c c _ i o 4 7 0 n 1 0 0 n 3 . 3 v r e g u l a t o r 3 . 3 v v c c s u p p l i e d f r o m e x t e r n a l 5 v . 5 v o r 3 . 3 v i o v o l t a g e . v c c s u p p l i e d f r o m e x t e r n a l 5 v . 3 . 3 v i o v o l t a g e g e n e r a t e d f r o m s a m e s o u r c e . 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 1 0 0 n 4 7 0 n + 5 v b a t 5 4 + v m v c c s u p p l i e d f r o m e x t e r n a l 5 v u s i n g a c t i v e s w i t c h . 5 v o r 3 . 3 v i o v o l t a g e . 4 k 7 1 0 k 2 x b c 8 5 7 o r 1 x b c 8 5 7 b s
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 16 www.trinamic.com 3.4.2 internal r egulator b ridged in case a clean external 5v supply is a vailable, it can be used for complete supply of analog and digital part ( figure 3 . 5 ). the circuit will benefit from a well - regulated supply, e.g. when using a + / - 1% regulator. a precise supply guarantee s increased motor current pr ecision , because the voltage at 5vout directly is the reference voltage for all internal units of the driver , especially for motor current control . for best performance, the power supply should have low ripple to give a precise and stable supply at 5vout p in with remaining ripple well below 5 mv. some switching regulators have a higher remaining ripple , or different loads on the supply may cause lower frequency ripple . in this case, increase capacity attached to 5vout. in case the external supply voltage has poor stability or low frequency ripple, this would affect the precision of the motor current regulation as well as add chopper noise . figure 3 . 5 using an external 5v supply to b ypass internal regulator 3.5 pre - regulator for reduced power dissipation when operating at supply voltages up to 46v for vs and vsa , the internal linear regulator will contribute with up to 1w to the power dissipation of the driver. this will reduce the capabi lity of the chip to continuously drive high motor current, especially at high environment temperatures. when no external power supply in the range 5v to 24v is available, an external pre - regulator can be buil t with a few inexpensive components in order to dissipate most of the voltage drop in external components . figure 3 . 6 shows different examples . in case a well - defined supply voltage is available, a single 1w or higher power z ener diode also does the job. figure 3 . 6 examples for simple pre - regulators 5 v v o l t a g e r e g u l a t o r + 5 v 5 v o u t v s a 4 . 7 v c c 4 7 0 n 1 0 r w e l l - r e g u l a t e d , s t a b l e s u p p l y , b e t t e r t h a n + - 5 % 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 4 7 0 n + v m 2 r 2 b c x 5 6 o r s i m i l a r 2 2 k 4 k 7 s i m p l e p r e - r e g u l a t o r f o r 2 4 v u p t o 4 6 v 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 4 7 0 n + v m 2 r 2 b c x 5 6 o r s i m i l a r 2 2 k s i m p l e s h o r t c i r c u i t p r o t e c t e d p r e - r e g u l a t o r f o r 2 4 v u p t o 4 6 v z 5 . 6 v e . g . m m 5 z 5 v 6 1 0 0 r 4 7 0 n 1 6 v 4 7 0 n 1 6 v
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 17 www.trinamic.com 3.6 5v only supply figure 3 . 7 5v only operation while the standard application c ircuit is limited to roughly 5.5 v lower supply voltage, a 5 v only application lets the ic run from a normal 5 v +/ - 5 % supply. in this application, linear regulator drop must be minimized. therefore, the major 5 v load is removed by supplying vcc directly from the external supply. in order to keep supply ripple away from the analog voltage reference, 5vout should have an own filtering capacity and the 5vout pin does not become bridged to the 5v supply. v c c _ i o t m c 5 1 3 0 a s p i i n t e r f a c e c s n s c k s d o / n a o s d i / n a i r e f e r e n c e s w i t c h p r o c e s s i n g r e f l / s t e p r e f r / d i r d i a g / i n t o u t a n d s i n g l e w i r e i n t e r f a c e 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p 2 2 n 6 3 v 1 0 0 n 1 6 v s w n / d i a g 0 s w _ s e l c l k _ i n s w p / d i a g 1 + v i o d r v _ e n n g n d p g n d a t s t _ m o d e d i e p a d o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n c o n t r o l l e r f u l l b r i d g e a f u l l b r i d g e b + 5 v v s s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 1 0 0 n b r b 1 0 0 f c p i c p o + v i o b r a r s a u s e l o w i n d u c t i v i t y s m d t y p e , e . g . 1 2 0 6 , 0 . 5 w r s b 1 0 0 n v c p d a c r e f e r e n c e a i n _ i r e f i r e f u s e l o w i n d u c t i v i t y s m d t y p e , e . g . 1 2 0 6 , 0 . 5 w e n c o d e r u n i t a b n e n c b e n c a e n c n o p t i o n a l i n c r e m e n t a l e n c o d e r i n p u t s s d _ m o d e s p i _ m o d e l e a v e o p e n o p t . d r i v e r e n a b l e + 5 v 5 v o u t v s a 4 . 7 v c c 4 7 0 n
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 18 www.trinamic.com 3.7 high motor current when operating at a high motor cu rrent, the driver power dissipation due to mosfet switch on - resistance significantly heats up the driver . this power dissipation will heat up the pcb cooling infrastructure also, if operated at an increased duty cycle. this in turn leads to a further incre ase of driver temperature. an increase of temperature by about 100c increases mosfet resistance by roughly 50%. this is a typical behavior of mosfet switches. therefore, u nder high duty cycle, high load conditions, thermal characteristics have to be caref ully taken into account, especially when increased environment temperatures are to be supported. refer the thermal characteristics and the layout hints for more information. as a thumb rule, thermal properties of the pcb design become critical for the tqfp - 48 at or above 1.2a rms motor current for increased periods of time. keep in mind that resistive power dissipation raises with the square of the motor current. on the other hand, this means that a small reduction of motor current significantly saves heat dissipation and energy. an effect which might be perceived at medium motor velocities and motor sine wave peak currents above roughly 1. 2 a peak is a slight sine distortion of the current wave when using spreadcycle. it results from an increasing negative impact of parasitic internal diode conduction , which in turn negatively influences the duration of the fast decay cycle of the spreadcycle chopper. this is, because the current measurement does not see the full coil current during this phase of the sine wa ve, because an increasing part of the current flows directly from the power mosfets drain to gnd and does not flow through the sense resistor. this effect with most motors does not negatively influence the smoothness of operation, as it does not impact th e critical current zero transition. the effect does not occur with stealthchop. 3.7.1 reduce linear regulator power dissipation when operating at high supply voltages, as a first step the power dissipation of the integrated 5v linear regulator can be reduced, e .g. by using an external 5v source for supply. this will reduce overall heating. it is advised to reduce motor stand still current in order to decrease overall power dissipation. if applicable, also use coolstep. a decreased clock frequency will reduce pow er dissipation of the internal logic. further a decreased chopper frequency also can reduce power dissipation. 3.7.2 operation near to / above 2 a peak current the driver can deliver up to 2.5a motor peak current. considering thermal characteristic s , this only is possible in duty cycle limited operation . when a peak current up to 2 .5 a is to be driven , the driver chip temperature is to be kept at a maximum of 105c. linearly derate the design peak temperature from 125c to 105c in the range 2a to 2.5a output cur rent (see figure 3 . 8 ) . exceeding this may lead to trigger ing the short circuit detection . figure 3 . 8 derating of maximum sine wave peak current at incr eased die temperature d i e t e m p e r a t u r e p e a k c o i l c u r r e n t 1 0 5 c 1 2 5 c 2 a o p e a r a t i o n n o t r e c o m m e n d e d f o r i n c r e a s e d p e r i o d s o f t i m e 2 . 5 a 1 . 7 5 a 1 1 5 c 1 3 5 c 1 . 5 a l i m i t b y l o w e r l i m i t o f o v e r t e m p e r a t u r e t h r e s h o l d s p e c i f i e d o p e r a t i o n a l r a n g e f o r m a x . 1 2 5 c d e r a t i n g f o r > 2 a h i g h t e m p e r a t u r e r a n g e c u r r e n t l i m i t a t i o n 2 . 2 5 a
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 19 www.trinamic.com 3.7.3 reduction of resistive losses by adding schottky diodes schottky diodes can be added t o the circuit to red uce driver power dissipation when driving high motor currents (see figure 3 . 9 ). the schottky diodes ha ve a conduction voltage of about 0.5v and will take over more than half of the motor current during the negative half wave of each output in slow decay and fast decay phases, thus leading to a cooler motor driver. this effect starts from a few percent at 1 .2a and increases with higher motor current rating up to roughly 20% . as a 30v schottky diode has a lower forward voltage than a 50v or 60v diode, it makes sense to use a 30v diode when the supply voltage is below 30v. the diodes will have less effect when working with stealthchop due to lower times of diode conduction in the chopper cycle. at current levels below 1 .2 a coil current, the effect of the diodes is negligible. figure 3 . 9 schottky diodes reduce power dissipation at high peak current s up to 2a (2.5a) f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r b r b b r a r s a r s b 1 a s c h o t t k y d i o d e s l i k e m s s 1 p 6 o r m s s 1 p 3 ( v m l i m i t e d t o 3 0 v )
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 20 www.trinamic.com 3.8 driver protection and eme circuitry some applications have to cope with esd events caused by motor operation or external influence. despite esd circuitry within the driver chips, esd events occurring during operation can cause a reset or even a destruction of the motor driver, depending on their energy. especially plastic housings and belt drive systems tend to cause esd events of several kv . it is best practice to avoid es d events by attaching all conductive parts, especially the motors themselves to pcb ground, or to apply electrically conductive plastic parts. in addition, the driver can be protected up to a certain degree against esd events or live plugging / pulling the motor, which also causes high voltages and high currents into the motor connector terminals. a simple scheme uses capacitors at the driver outputs to reduce the dv/dt caused by esd events. larger capacitors will bring more benefit concerning esd suppressi on, but cause additional current flow in each chopper cycle, and thus increase driver power dissipation, especially at high supply voltages. the values shown are example values C they might be varied between 100pf and 1nf. the capacitors also dampen high f requency noise injected from digital parts of the application pcb circuitry and thus reduce electromagnetic emission. a more elaborate scheme uses lc filters to de - couple the driver outputs from the motor connector. varistors in between of the coil termina ls eliminate coil overvoltage caused by live plugging. optionally protect all outputs by a varistor against esd voltage. figure 3 . 10 simple esd enhancement and more elaborate mot or output protection f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v 5 0 o h m @ 1 0 0 m h z 5 0 o h m @ 1 0 0 m h z 5 0 o h m @ 1 0 0 m h z 5 0 o h m @ 1 0 0 m h z v 1 v 2 f i t v a r i s t o r s t o s u p p l y v o l t a g e r a t i n g . s m d i n d u c t i v i t i e s c o n d u c t f u l l m o t o r c o i l c u r r e n t . 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v v a r i s t o r s v 1 a n d v 2 p r o t e c t a g a i n s t i n d u c t i v e m o t o r c o i l o v e r v o l t a g e . v 1 a , v 1 b , v 2 a , v 2 b : o p t i o n a l p o s i t i o n f o r v a r i s t o r s i n c a s e o f h e a v y e s d e v e n t s . b r b r s a b r a 1 0 0 n f 1 6 v r s b 1 0 0 n f 1 6 v v 1 a v 1 b v 2 a v 2 b
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 21 www.trinamic.com 4 spi interface 4.1 spi datagram structure the tmc 5130a uses 40 bit spi? (serial peripheral interface, spi is trademark of motorola) datagrams for communication with a microcontroller. microcontrollers which are equipped with hardware spi are typically able to communicate using integer multiples of 8 bit. the ncs line of the device must be handled in a way, that it stays active (low) for the complete duration of the datagram transmission. each datagram sent to the device is composed of an address byte followed by four data bytes. this allows direct 32 bit data word comm unication with the register set . each register is accessed via 32 data bits even if it uses less than 32 data bits. for simplification, each register is specified by a one byte address: - for a read access the most significant bit of the address byte is 0. - for a write access the most significant bit of the address byte is 1. most registers are write only registers, some can be read additionally, and there are also some rea d only registers. 4.1.1 selection of write / read (write_notread) the read and write selection is controlled by the msb of the address byte (bit 39 of the spi datagram). this bit is 0 for read access and 1 for write access. so, the bit named w is a write_not read control bit. the active high write bit is the msb of the address byte. so, 0x80 has to be added to the address for a write access. the spi interface always delivers data back to the master, independent of the w bit. the data transferred back is the da ta read from the address which was transmitted with the previous datagram, if the previous access was a read access. if the previous access was a write access, then the data read back mirrors the previously received write data. so, the difference between a read and a write access is that the read access does not transfer data to the addressed register but it transfers the address only and its 32 data bits are dummies, and, further the following read or write access delivers back the data read from the addre ss transmitted in the preceding read cycle. a read access request datagram uses dummy write data. read data is transferred back to the master with the subsequent read or write access. hence, reading multiple registers can be done in a pipelined fashion . whenever data is read from or written to the tmc 5130a , the msbs delivered back contain the spi status, spi_status , a number of eight selected status bits. spi d atagram s tructure msb (transmitted first) 40 bit lsb (transmitted last) 39 ... ... 0 ? 8 bit address ? 8 bit spi status ? ? 32 bit data 39 ... 32 31 ... 0 ? to tmc 5130a rw + 7 bit address ? from tmc 5130a 8 bit spi status 8 bit data 8 bit data 8 bit data 8 bit data 39 / 38 ... 32 31 ... 24 23 ... 16 15 ... 8 7 ... 0 w 38...32 31...28 27...24 23...20 19...16 15...12 11...8 7...4 3...0 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 22 www.trinamic.com example : for a read access to the register ( x actual ) with the address 0x2 1, the a ddress byte has to be set to 0x2 1 in the access preceding the read access. for a write access to the register ( v actual ), the address byte has to be set to 0x80 + 0x22 = 0xa2. for read access, the data bit might have any value ( - ). so, one can set them to 0. action data se nt to tmc 5130a data received from tmc 5130a read x actual ? 0x2100000000 ? 0xss & unused data read x actual ? 0x2100000000 ? 0xss & x actual write v max := 0x00abcdef ? 0xa 7 00abcdef ? 0xss & x actual write v max := 0x00123456 ? 0xa 7 00123456 ? 0xss00abcdef *)s: is a placeholder for the status bits spi_status 4.1.2 spi status bits transferred with each datagram read back new status information becomes latched at the end of each access and is available with the next spi transfer. spi_status C status flags transmitted with each spi access in bits 39 to 32 bit name comment 7 s tatus_stop_r ramp_stat [ 1 ] C status_stop_l ramp_stat [0] C position _reached ramp_stat [ 9 ] C velocity_reached ramp_stat [8] C standstill drv _status [ 31 ] C sg2 drv _status [ 24 ] C driver_error gstat [1] C gstat ) 0 reset_flag gstat [ 0 ] C gstat ) 4.1.3 data alignment all data are right aligned. some registe rs represent unsigned (positive) values, some represent integer values (signed) as twos complement numbers, single bits or groups of bits are represented as single bits respectively as integer groups. 4.2 spi signals the spi bus on the tmc 5130a has four sig nals: - sck C bus clock input - sdi C serial data input - sdo C serial data output - csn C chip select input (active low) the slave is enabled for an spi transaction by a low on the chip select input csn. bit transfer is synchronous to the bus clock sck, with the slave latching the data from sdi on the rising edge of sck and driving data to sdo following the falling edge. the most significant bit is sent first. a minimum of 40 sck clock cycles is required for a bus transaction with the tmc 5130a . if more than 40 cl ocks are driven, the additional bits shifted into sdi are shifted out on sdo after a 40 - clock delay through an internal shift register. this can be used for daisy chaining multiple chips. csn must be low during the whole bus transaction. when csn goes high , the contents of the internal shift register are latched into the internal control register and recognized as a command from the master to the slave. if more than 40 bits are sent, only the last 40 bits received before the rising edge of csn are recognize d as the command.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 23 www.trinamic.com 4.3 timing the spi interface is synchronized to the internal system clock, which limits the spi bus clock sck to half of the system clock frequency. if the system clock is based on the on - chip oscillator, an additional 10% safety margin must be used to ensure reliable data transmission. all spi inputs as well as the enn input are internally filtered to avoid triggering on pulses shorter than 20ns. figure 4 . 1 shows the timing parameters of an spi bus transaction, and the table below specifies their values. figure 4 . 1 spi timing hint usually this spi timing is referred to as spi mode 3 spi interface timing ac - characteristics clock period: t c lk parameter symbol conditions min typ max unit sck valid before or after change of csn t cc 10 ns csn high time t csh *) min time is for syn chronous clk with sck high one t ch before csn high only t clk *) >2t clk +10 ns sck low time t cl *) min time is for syn chronous clk only t clk *) >t clk +10 ns sck high time t ch *) min time is for syn chronous clk only t clk *) >t clk +10 ns sck frequency using internal clock f sck assumes minimum osc frequency 4 mhz sck frequency using external 16mhz clock f sck assu mes synchronous clk 8 mhz sdi setup time before rising edge of sck t du 10 ns sdi hold time after rising edge of sck t dh 10 ns data out valid time after falling sck clock edge t do no capacitive load on sdo t filt +5 ns sdi, sck and csn filter de lay time t filt rising and falling edge 12 20 30 ns c s n s c k s d i s d o t c c t c c t c l t c h b i t 3 9 b i t 3 8 b i t 0 b i t 3 9 b i t 3 8 b i t 0 t d o t z c t d u t d h t c h
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 24 www.trinamic.com 5 uart single wire interface the uart single wire interface allows the control of the tmc 5130a - ta with any microcontroller uart. it shares transmit and receive line like an rs485 based interface. data tr ansmission is secured using a cyclic redundancy check, so that increased interface distances (e.g. over cables between two pcbs) can be bridged without the danger of wrong or missed commands even in the event of electro - magnetic disturbance. the automatic baud rate detection and an advanced addressing scheme make this interface easy and flexible to use. 5.1 datagram structure 5.1.1 write access uart w rite access datagram structure each byte is lsbmsb, highest byte transmitted first 0 63 sync + reserved 8 bit s lave address rw + 7 bit register addr . 32 bit data crc 07 815 1623 24 55 56 63 1 0 1 0 reserved (dont cares but included in crc) slaveaddr register address 1 data bytes 3, 2, 1, 0 (high to low byte) crc 0 1 2 3 4 5 6 7 8 15 16 23 24 55 56 63 a sync nibble precedes each transmission to and from the tmc 5130a and is embedded into the first transmitted byte , followed by an addressing byte . each transmission allows a synchronization of the internal baud rate divider to the master clock. the actu al baud rate is adapted and variations of the internal clock frequency are compensated. thus, the baud rate can be freely chosen within the valid range. each transmitted byte starts with a start bit (logic 0, low level on swiop) and ends with a stop bit (l ogic 1, high level on swiop). the bit time is calculated by measuring the time from the beginning of start bit (1 to 0 transition) to the end of the sync frame (1 to 0 transition from bit 2 to bit 3). all data is transmitted byte wise. the 32 bit data word s are transmitted with the highest byte first. a minimum baud rate of 9000 baud is permissible, assuming 20 mhz clock (worst case for low baud rate). maximum baud rate is f clk /16 due to the required stability of the baud clock. the slave address is dete rmined by the register slaveaddr . if the external address pin nextaddr is set, the slave addr ess becomes incremented by one. the communication becomes reset if a pause time of longer than 63 bit times between the start bits of two successive bytes occurs. this timing is based on the last correctly received datagram. in this case, the transmission needs to be restarted after a failure recovery time of minimum 12 bit times of bus idle time . this scheme allows the master to reset communication in case of tran smission errors. any pulse on an idle data line below 16 clock cycles will be treated as a glitch and leads to a timeout of 12 bit times, for which the data line must be idle. other errors like wrong crc are also treated the same way. this allows a safe re - synchronization of the transmission after any error conditions. rem ark, that due to this mechanism an abrupt reduction of the baud rate to less than 15 percent of the previous value is not possible. each accepted write datagram becomes acknowledged by th e receiver by incrementing an internal cyclic datagram counter (8 bit). reading out the datagram counter allows the master to check the success of an initialization sequence or single write accesses. read accesses do not modify the counter.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 25 www.trinamic.com 5.1.2 read access uart r ead access request d atagram structure each byte is lsbmsb, highest byte transmitted first sync + reserved 8 bit slave address rw + 7 bit register address crc 0...7 815 1623 2431 1 0 1 0 reserved (dont cares but included in crc) slaveaddr re gister address 0 c rc 0 1 2 3 4 5 6 7 8 15 16 23 24 31 the read access request datagram structure is identical to the write access datagram structure, but uses a lower number of user bits. its function is the addressing of the slave and the transmi ssion of the desired register address for the read access. the tmc 5130a responds with the same baud rate as the master uses for the read request. in order to ensure a clean bus transition from the master to the slave, the tmc 5130a does not immediately sen d the reply to a read access, but it uses a programmable delay time after which the first reply byte becomes sent following a read request. this delay time can be set in multiples of eight bit times using senddelay time setting (default=8 bit times) accord ing to the needs of the master. in a multi - slave system, set senddelay to min. 2 for all slaves. otherwise a non - addressed slave might detect a transmission error upon read access to a different slave. uart r ead access reply dat agram structure each byte is lsbmsb, highest byte transmitted first 0 ... ... 63 sync + reserved 8 bit slave address rw + 7 bit register addr . 32 bit data crc 07 815 1623 24 55 56 63 1 0 1 0 reserved (0) 0xff register address 0 data bytes 3, 2, 1, 0 (high to low byte) crc 0 1 2 3 4 5 6 7 8 15 16 23 24 55 56 63 the read response is sent to the master using address code %1111. the transmitter becomes switched inactive four bit times after the last bit is sent. address %1111 1111 is reserved for read accesses going to the master. a slave cannot use this address. e rrata i n r ead a ccess a known bug in the uart interface implementation affects read access to registers that change during the access. while the spi interface takes a snapshot of the read register before transmission, the uart interface transfers the register directly msb to lsb without taking a snapshot. this may lead to inconsistent data when reading out a register that cha nges during the transmission. further, the crc sent from the driver may be incorrect in this case (but must not) , which will lead to the master repeating the read access . as a workaround, it is advised not to read out quickly changing registers like x actua l , mscnt or x_ enc during a motion, but instead first stop the motor or check the position _reached flag to become active, and read out these values afterwards. if possible, use x_latch and enc_latch for a safe readout during motion (e.g. for homing) . as the encoder cannot be guaranteed to stand still during motor stop, only a dual read access and check for identical result ensures correct x_enc read data. use the vzero and velocity_reached flag rather than reading v actual .
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 26 www.trinamic.com 5.2 crc calculation an 8 bit crc pol ynomial is used for checking both read and write access. it allows detection of up to eight single bit errors. the crc8 - atm polynomial with an initial value of zero is applied lsb to msb, including the sync - and addressing byte. the sync nibble is assumed to always be correct. the tmc 5130a responds only to correctly transmitted datagrams containing its own slave address. it increases its datagram counter for each correctly received write access datagram. ??? = ? 8 + ? 2 + ? 1 + ? 0 s erial calculation ex ample crc = (crc << 1) or (crc.7 xor crc.1 xor crc.0 xor [new incoming bit]) c - c ode e xample for crc calculation void swuart_calccrc(uchar* datagram, uchar datagramlength) { int i,j; uchar* crc = datagram + (datagramlength - 1 ); // crc located in last byte of message uchar currentbyte; *crc = 0 ; for (i= 0 ; i <(datagramlength - 1 ); i++) { // execute for all bytes of a message currentbyte = datagram[i]; // retrieve a byte to be sent from array for (j= 0 ; j< 8 ; j++) { if ((*crc >> 7 ) ^ (currentbyte& 0x01 )) // update crc based result of xor operation { *crc = (*crc << 1 ) ^ 0x07 ; } else { *crc = (*crc << 1 ); } currentbyte = currentbyte >> 1 ; } // for crc bit } // for message byte } 5.3 uart signals the uart interface on the tmc 5130a - ta comprises four signals: tmc 5130a uart i nterface s ignals swiop non - inverted data input and output swion inverted data input and output for use in differential transmission . can be left op en in a 5v io voltage system. tie to the half io level voltage for best performance in a 3.3v single wire non - differential application . n ai address increment pin for chained sequential addressing scheme nao next address output pin for chained sequential addressing scheme (reset default= high) in uart mode (sw_sel high) the slave checks the s ingle wire swiop and swion for correctly received datagrams with its own address continuously. both signals are switched as input during this time. it adapts to the baud rate based on the sync nibble, as described before. in case of a read access, it switches on its output drivers on swiop and swion and sends its response using the same baud rate.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 27 www.trinamic.com 5.4 addressing multiple slaves a ddressing one or two s laves if only one or two tmc 5130a are addressed by a master using a single uart interface, a hardware address selection can be done by setting the n ai pins of both devices to different levels . a ddressing up to 255 s laves a different approach can address any number of devic es by using the input nai as a selection pin . addressing up to 25 5 units is possible. figure 5 . 1 addressing multiple tmc 5130a via single wire interface using chaining p roceed as follows : - tie the n ai pin of your first tmc 5130a to gnd. - interconnect nao output of the first tmc 5130a to the next drivers n ai pin. connect further drivers in the same fashion. - now, the first driver responds to address 0. following drivers are set to add ress 1. - program the first driver to its dedicated slave address. note: once a driver is initialized with its slave address, its nao output, which is tied to the next drivers n ai has to be programmed to logic 0 in order to differentiate the next driver fro m all following devices . - now, the second driver is accessible and can get its slave address. further units can be programmed to their slave addresses sequentially. m a s t e r c p u ( c w i t h u a r t , s o f t w a r e s w i t c h e s t x d t o h i - z f o r r e c e i v i n g ) t m c 5 1 3 0 a # 1 n a i n a o s w i o p s w i o n t m c 5 1 3 0 a # 2 n a i s w i o p s w i o n n a o t m c 5 1 3 0 a # 3 n a i s w i o p s w i o n t x d a d d r e s s 0 , n a o i s h i g h a d d r e s s 1 a d d r e s s 1 p r o g r a m t o a d d r e s s 2 5 4 & s e t n a o l o w a d d r e s s 0 , n a o i s h i g h a d d r e s s 1 a d d r e s s 2 5 4 p r o g r a m t o a d d r e s s 2 5 3 & s e t n a o l o w a d d r e s s 0 a d d r e s s 2 5 4 a d d r e s s 2 5 3 p r o g r a m t o a d d r e s s 2 5 2 & s e t n a o l o w r i d l e + v i o r i d l e f o r c e s s t o p b i t l e v e l i n i d l e c o n d i t i o n s , 3 k 3 i s s u f f i c i e n t w i t h 1 4 s l a v e s r x d a d d r e s s i n g p h a s e 1 : a d d r e s s i n g p h a s e 2 : a d d r e s s i n g p h a s e 3 : a d d r e s s i n g p h a s e 4 : e x a m p l e f o r a d d r e s s i n g u p t o 2 5 5 t m c 5 1 3 0 a a d d r e s s i n g p h a s e x : c o n t i n u e p r o c e d u r e
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 28 www.trinamic.com figure 5 . 2 a ddressing multiple tmc 5130a via the differential interface , additional filtering for nai a different scheme (not shown) uses bus switches (like 74hc4066) to connect the bus to the next unit in the chain without using the nai input. the bus switch can be co ntrolled in the same fashion, using the nao output to enable it (low level shall enable the bus switch). once the bus switch is enabled it allows address ing the next bus segment. as bus switches add a certain resistance, the maximum number of nodes will be reduced. it is possible to mix different styles of addressing in a system. for example , a system using two boards with each two tmc 5130a can have both devices on a board with a different level on nextaddr, while the next board is chained using analog swi tches separating the bus until the drivers on the first board have been programmed . m a s t e r c p u ( c w i t h r s 4 8 5 t r a n c e i v e r ) t m c 5 1 3 0 a # 1 n a i n a o s w i o p s w i o n t m c 5 1 3 0 a # 2 n a i s w i o p s w i o n t m c 5 1 3 0 a # 3 s w i o p s w i o n a b a d d r e s s i n g p h a s e 1 : a d d r e s s 0 , n a o h i g h a d d r e s s 1 a d d r e s s 1 a d d r e s s i n g p h a s e 2 : p r o g r a m t o a d d r e s s 2 5 4 & s e t n a o l o w a d d r e s s 0 , n a o h i g h a d d r e s s 1 a d d r e s s i n g p h a s e 3 : a d d r e s s 2 5 4 p r o g r a m t o a d d r e s s 2 5 3 & s e t n a o l o w a d d r e s s 0 , n a o h i g h a d d r e s s i n g p h a s e 4 : a d d r e s s 2 5 4 a d d r e s s 2 5 3 p r o g r a m t o a d d r e s s 2 5 2 & s e t n a o l o w 1 k + v i o n a o n a i e x a m p l e f o r a d d r e s s i n g u p t o 2 5 5 t m c 5 1 3 0 a a d d r e s s i n g p h a s e x : c o n t i n u e p r o c e d u r e r t e r m r t e r m r f i l t c f i l t r f i l t c f i l t
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 29 www.trinamic.com 6 register mapping this chapter gives an overview of the complete register set. some of the registers bundling a number of single bits are detailed in extra tables. the f unctional practical application of the settings is detailed in dedicated chapters. note - all registers become reset to 0 upon power up, unless otherwise noted. - add 0x80 to the address addr for write accesses! n otation of hexadecim al and binary number s 0x precedes a hexadecimal number, e.g. 0x04 % precedes a multi - bit binary number, e.g. %100 n otation of r/w field r read only w write only r/w read - and writable register r+c clear upon read o verview r egister m apping r egister d escription gene ral configuration registers these registers contain - global configuration - global status flags - interface configuration - and i/o signal configuration ramp generator motion control register set this register set offers registers for - choosing a ramp mode - cho o sing velocities - homing - ac celeration and deceleration - target positioning - reference switch and stallguard2 ev ent configuration - ramp and re ference switch status velocity dependent driver feature control register set this register set offers registers for - dr iver current control - setting th resholds for coolstep operation - setting threshol ds for different chopper modes - setting thresholds for dcstep operation encoder register set the encoder register set offers all registers needed for proper abn encoder operatio n. motor driver register set this register set offers registers for - setting / reading o ut microstep table and counter - ch opper and driver configuration - coolstep and stallguard2 con figuration - dcstep configuration - reading out stallguard2 values and driver er ror flags
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 30 www.trinamic.com 6.1 general configuration registers g eneral c onfiguration registe rs (0 x 000 x 0 f) r/w addr n register description / bit names rw 0x00 1 7 gconf bit gconf C global configuration flags 0 i_scale _analog 0: normal operation, use internal refer ence voltage 1: use voltage supplied to ain as current reference 1 i nternal_rsense 0: normal operation 1: internal sense resistors. use current supplied int o ain as reference for internal sense resistor 2 en_pwm_mode 1: stealthchop voltage pwm mode enabled (depending on velocity thresholds) . switch from off to on state while in stand still, only. 3 enc_commutation ( special mode - d o not use, leave 0) 1: enable commutation by full step encoder ( dcin_cfg5 = enc_a, dcen_ cfg4 = enc_b) 4 shaft 1: inverse motor direction 5 diag0_error (only with sd_m ode=1) 1: enable diag0 active on driver errors: over temperature ( ot ), short to gnd ( s2g ) , undervoltage chargepump ( uv_cp ) diag 0 always shows the reset - status , i.e. is active low during reset condition . 6 diag0_otpw (o nly with sd_mode=1) 1: enable diag 0 active on driver ov er temperature prewarning ( otpw ) 7 diag0_stall (with sd_mode=1) 1: enable diag 0 active on motor stall (set tcoolthrs before using this feature) diag0_step (with sd_mode= 0 ) 0: diag0 outputs i nterru pt signal 1: enable d iag 0 as step output (dual edge triggered steps) for external step/dir driver 8 diag1_stall (with sd_mode=1) 1: enable diag1 active on motor stall (set tcoolthrs before using this feature) diag1_dir (with sd_mode= 0 ) 0: diag1 output s position compare signal 1: enable d iag1 as dir output for external step/dir driver 9 diag1_index (only with sd_mode=1) 1: enable diag1 active on index position (microstep look up table position 0) 10 diag1_onstate (only with sd_mode=1) 1: enabl e diag1 active when chopper is on (for the coil which is in the second half of the fullstep) 11 diag1_steps_skipped (only with sd_mode=1) 1: enable output toggle when steps are skipped in dcstep mode (increment of lost_steps ) . do not enable in con jun ction with other diag1 options .
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 31 www.trinamic.com g eneral c onfiguration registe rs (0 x 000 x 0 f) r/w addr n register description / bit names 1 2 diag0_ int_ pushpull 0: swn_ diag0 is open collector output (active low) 1: enable swn_ diag0 push pull output (active high ) 13 diag1 _poscomp _pushpull 0: swp_ diag1 is open collector output (active low) 1: enable s wp_ diag1 push pull output (active high) 1 4 small_hysteresis 0: hysteresis for step frequency comparison is 1/16 1: hysteresis for step frequency comparison is 1/32 15 stop_enable 0: normal operation 1: emergency stop: enca_ dci n stops the sequenc er when tied high (no steps become executed by the sequencer , motor goes to standstill state ) . 16 direct_mode 0: normal operation 1: motor coil currents and polarity directly programmed via serial interface: register xtarget ( 0x2d ) specifies signed coil a current (bits 8..0) and coil b current (bits 24..16). in this mode, the current is scaled by ihold setting. velocity based current regulation of stealthchop is not available in this mode. the automatic stealthchop current regulation will work only f or low stepper motor velocities. 17 test_mode 0: normal operation 1: enable analog test output on pin encn_dco . ihold [1..0] selects the function of encn_dco : 02: t120, dac, vddh attention: not for user, set to 0 for normal operation! r+c 0x01 3 gs tat bit gstat C global status flags 0 reset 1: indicates that the ic has been reset since the last read access to gstat . all registers have been cleared to reset values. 1 drv_err 1: indicates, that the driver has been shut down due to overte mperature or short circuit detection since the last read access. read drv_status for details. the flag can only be reset when all error conditions are cleared. 2 uv_cp 1: indicates an undervoltage on the charge pump. the driver is disabled in this cas e. r 0x02 8 ifcnt interface transmission counter. this register becomes incremented with each successful uart interface write access. it can be read out to check the serial transmission for lost data. read accesses do not change the content. disabled in s pi operation. the counter wraps around from 255 to 0.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 32 www.trinamic.com g eneral c onfiguration registe rs (0 x 000 x 0 f) r/w addr n register description / bit names w 0x03 8 + 4 slaveconf bit slaveconf 7 ..0 slaveaddr : these eight bits set the address of unit for the uart interface. the address becomes incremented by one when the external address pin nextaddr is active. range: 0 - 25 3 ( 25 4 cannot be incremented ), default=0 11 .. 8 senddelay : 0 , 1 : 8 bit times (not allowed with multiple slaves) 2, 3 : 3 *8 bit times 4, 5: 5*8 bit times 6, 7: 7*8 bit times 8, 9: 9*8 bit times 10, 11: 11*8 bit times 12, 13: 13*8 bit times 14, 15: 15*8 b it times r 0x0 4 8 + 8 ioin bit input reads the state of all input pins available 0 refl_step 1 refr_dir 2 encb_ dcen _cfg4 3 enca_ dcin_cfg5 4 drv_enn_cfg6 5 enc_n_dco 6 sd_mode (1=external step and dir source) 7 swcomp_in (shows voltage difference of swn and swp. bring diag outputs to high level with pushpull disabled to test the comparator . ) 31.. 24 version : 0x 1 1=first version of the ic identical numbers mean full digital compatibility. w 0x04 1 output bit output sets the io output pin polarity in uart mode 0 in uart mode, sdo_cfg0 is an output. this bit programs the output polarity of this pin. its main purpose it to use sdo_cfg0 as nao next address output signal for chain addressing of multipl e ics. attention: reset value is 1 for use as nao to next ic in single wire chain w 0x05 32 x_compare position comparison register for motion controller position strobe. the p osition pulse is available on output swp_diag1 . xactual = x_compare : - output s ignal pp (position pulse) becomes high. it returns to a low state, if the positions mismatch.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 33 www.trinamic.com 6.2 velocity dependent driver feature control register set v elocity d ependent driver feature contr ol register set (0 x 1 00 x 1f ) r/w addr n register description / bit names w 0x 1 0 5 + 5 + 4 ihold_irun bit ihold_irun C driver current control 4..0 ihold standstill current (0=1/3231=32/32) in combination with stealthchop mode, setting ihold =0 allows to choose freewheeling or coil short circuit for motor stand s till. 12..8 irun motor run current (0=1/3231=32/32) hint: choose sense resistors in a way, that normal irun is 16 to 31 for best microstep performance. 19..16 iholddelay controls the number of clock cycles for motor power down after a motion as soon as standstill is detected ( stst =1) and t powerdown has expired . the smooth transition avoids a motor jerk upon power down. 0: instant power down 1..15: delay per current reduction step in multiple of 2^18 clocks w 0x11 8 t power down t powerdown set s the delay time after stand still ( stst ) of the motor to motor current power down. time range is about 0 to 4 seconds. 0 ( (2^ 8 ) - 1 ) * 2^18 t clk r 0x12 20 tstep actual measured time between two 1/256 microsteps derived from the step input frequency in unit s of 1/fclk. measured value is (2^20) - 1 in case of overflow or stand still. all tstep related thresholds use a hysteresis of 1/16 of the compare value to compensate for jitter in the clock or the step frequency. the flag small_hysteresis modifies the hys teresis to a smaller value of 1/32. ( txxx *15/16) - 1 or ( txxx *31/32) - 1 is used as a second compare value for each comparison value. this means, that the lower switching velocity equals the calculated setting, but the upper switching velocity is higher as de fined by the hysteresis setting. when working with the motion controller, the measured tstep for a given velocity v is in the range (2 2 4 / v) ts tep 2 2 4 / v - 1 . in dcstep mode tstep will not show the mean velocity of the motor, but the velocities for each microstep, which may not be stable and thus do es not represent the real motor velocity in case it runs slower than the target veloci ty. w 0x13 20 tpwmthrs this is the upper velocity for stealthchop voltage pwm mode . tstep tpwmthrs - stealthchop pwm mode is enabled, if configured - dcstep is disabled
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 34 www.trinamic.com v elocity d ependent driver feature contr ol register set (0 x 1 00 x 1f ) r/w addr n register description / bit names w 0x14 20 tcoolthrs this is the lower threshold velocity for switching on smart energ y coolstep and stallguard feature . (unsigned) set this parameter to disable coolstep at low speeds, where it cannot work reliably. t he stop on stall function ( enable with sg_stop when using internal motion controller) and the stall output signal become e nabled when exceeding this velocity . in non - dcstep mode, it becomes disabled again once the velocity falls below this threshold. tcoolthrs tstep thigh : - coolstep is enabled, if configured - stealthchop voltage pwm mode is disabled tcoolthrs tstep - stop on stall and stall output signal is enabled, if configured w 0x15 20 t high this velocity setting allows velocity dependent switching into a different chopper mode and fullstepping to maximize torque. (unsigned) the stall detection feature becomes switched off for 2 - 3 electrical periods whenever passing thigh threshold to compensate for the effect of switching modes. tstep t high : - coolstep is disabled (motor runs with normal current scale) - stealthchop v oltage pwm mode is disabled - if vhighchm is set, the chopper switches to chm =1 with tfd =0 (constant off time with slow decay, only). - chopsync2 is switched off ( sync =0) - if vhighfs is set, the m otor operates in fullstep mode and the stall detection becomes switched over to dcstep stall detection . m icrostep velocity time reference t for velocities: tstep = f clk / f step
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 35 www.trinamic.com 6.3 ramp generator registers 6.3.1 ramp generator motion control register set r amp ge nerator motion control register set ( 0 x 200 x 2d ) r/w addr n register description / bit names range [unit] rw 0x20 2 rampmode rampmode: 0: positioning mode (using all a, d and v parameters) 1: velocity mode to positive vmax (using amax acceleration) 2: vel ocity mode to negative vmax (using amax acceleration) 3: hold mode (velocity remains unchanged, unless stop event occurs) 03 rw 0x21 32 xactual actual motor position (signed) hint: this value normally should only be modified, when homing the drive. in p ositioning mode, modifying the register content will start a motion. - 2^31 +(2^31) - 1 r 0x22 24 vactual actual motor velocity from ramp generator (signed) the sign matches the motion direction. a negative sign means motion to lower xactual . + - (2^23) - 1 [ steps / t] w 0x23 18 vstart motor start velocity (unsigned) set vstop vstart! 0(2^18) - 1 [steps / t] w 0x24 16 a1 first acceleration between vstart and v1 (unsigned) 0(2^16) - 1 [steps / ta2] w 0x25 20 v1 first acceleration / deceleration phase t hreshold velocity (unsigned) 0: disables a1 and d1 phase, use amax , d max o nly 0(2^20) - 1 [steps / t] w 0x26 16 amax second acceleration between v1 and vmax (unsigned) this is the acceleration and deceleration value for velocity mode. 0(2^16) - 1 [steps / ta2] w 0x27 23 vmax motion ramp target velocity (for positioning ensure vmax vstart ) (unsigned) this is the target velocity in velocity mode. it can be changed any time during a motion. 0(2^23) - 512 [steps / t] w 0x28 16 dmax deceleration between vmax and v1 (unsigned) 0(2^16) - 1 [steps / ta2] w 0x2a 16 d1 deceleration betwe en v1 and vstop (unsigned) attention: do not set 0 in positioning mode, even if v1=0! 1(2^16) - 1 [steps / ta2]
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 36 www.trinamic.com r amp ge nerator motion control register set ( 0 x 200 x 2d ) r/w addr n register description / bit names range [unit] w 0x2b 18 vstop motor stop velocity (unsigned) attention: set vstop vstart! attention: do not set 0 in positioning mode , minimum 10 recom mend ! 1(2^18) tzero wait defines the w aiting time after ramping down to zero velocity before next movement or direction inversion can start. time range is about 0 to 2 seconds. this setting avoids excess acceleration e.g. from vs top to - vstart . 0(2^16) clk rw 0x2d 32 xtarget target position for ramp mode (signed). write a new target position to this register in order to activate the ramp generator positioning in rampmode =0. initialize all velocity, acceleration and dece leration parameters before. hint: the position is allowed to wrap around, thus, xtarget value optionally can be treated as an unsigned number. hint: the maximum possible displacement is +/ - ((2^31) - 1). hint: when increasing v1, d1 or dmax during a motio n, rewrite xtarget afterwards in order to trigger a second acceleration phase, if desired. - 2^31
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 37 www.trinamic.com 6.3.2 ramp generator driver feature control register set r amp generator driver feature control register set ( 0 x 300 x 36) r/w addr n register descripti on / bit names w 0x33 23 vdcmin automatic commutation dcstep becomes enabled above velocity v dcmin (unsigned) (only when using internal ramp generator, not for step/dir interface C in step/dir mode, dcstep becomes enabled by the external signal dcen) in this mode, the actual position is determined by the sensor - less motor commutation and becomes fed back to xactual . in case the motor becomes heavily loaded, vdcmin also is used as the minimum step velocity. activate stop on stall ( sg _ stop ) to detect step l oss. 0: disable, dcstep off |vact| vdcmin 256: - triggers the same actions as exceeding t high setting . - switches on automatic commutation dcstep hint: also set dcctrl parameters in order to operate dcstep. (only bits 22 8 are used for value and for comparison) rw 0x34 11 sw_mode switch mode configuration see separate table! r+c 0x35 14 ramp_stat ramp status and switch event status see separate table! r 0x36 32 xlatch ramp generator latch position, latches xactual upon a programmable switch even t (see sw_mode ). hint: the encoder position can be latched to enc_latch together with xlatch to allow consistency checks. t ime reference t for velocities: t = 2^24 / f clk t ime reference ta2 for accelerations: ta2 = 2^41 / (f clk )2
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 38 www.trinamic.com 6.3.2.1 sw_mode C reference s witch & stallguard2 event configuration register 0 x 34 : sw_mode C reference switch and stall g uard 2 event configuration register bit name comment 11 en_softstop 0: hard stop 1: soft stop the soft stop mode always uses the deceleration ramp settings dmax , v 1 , d1 , vstop and tzerowait for stopping the motor. a stop occurs when the velocity sign matches the reference switch position (refl for negative velocities, refr for positive velocities) and the respective switch stop function is enabled. a hard stop al so uses tzerowait before the motor becomes released. attention: do not use soft stop in combination with stallguard2 . 10 sg_stop 1: enable stop by stallguard2 (also available in dcstep mode) . disable to release motor after stop event. attention: do not enable during motor spin - up, wait until the motor velocity exceeds a certain value, where stallguard 2 delivers a stable result. this velocity threshold should be programmed using tcoolthrs. 9 en_latch_encoder 1: latch encoder position to enc_latch upon re ference switch event. 8 latch_r_inactive 1: activates latching of the position to xlatch upon an inactive going edge on the right reference switch input refr. the active level is defined by pol_stop_r . 7 latch_r_active 1: activates latching of the positi on to xlatch upon an active going edge on the right reference switch input refr. hint: activate latch_r_active to detect any spurious stop event by reading status_latch_r. 6 latch_l_inactive 1: activates latching of the position to xlatch upon an inactiv e going edge on the left reference switch input refl. the active level is defined by pol_stop_ l. 5 latch_l_active 1: activates latching of the position to xlatch upon an active going edge on the left reference switch input refl. hint: activate latch_l_ac tive to detect any spurious stop event by reading status_latch_l. 4 swap_lr 1: swap the left and the right reference switch input refl and refr 3 pol_stop_r sets the active polarity of the right reference switch input 0=non - inverted, high active: a high level on refr stops the motor 1=inverted, low active : a low level on refr stops the motor 2 pol_stop_l sets the active polarity of the left reference switch input 0=non - inverted, high active: a high level on refl stops the motor 1=inverted, low active : a low level on refl stops the motor 1 stop_r_enable 1: enables automatic motor stop during active right reference switch input hint: the motor restarts in case the stop switch becomes released. 0 stop_l_enable 1: enables automatic motor stop during acti ve left reference switch input hint: the motor restarts in case the stop switch becomes released.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 39 www.trinamic.com 6.3.2.2 ramp_stat C ramp & reference switch status register 0 x 35 : ramp_stat C ramp and reference s witch status registe r r/w bit name comment r 13 status_sg 1: signals an active stallguard2 input from the coolstep driver or from the dcstep unit, if enabled. hint: when polling this flag, stall events may be missed C activate sg_stop to be sure not to miss the stall event. r+c 12 second_move 1: signals that the automatic ramp require d moving back in the opposite direction, e.g. due to on - the - fly parameter change (flag is cleared upon reading) r 11 t_zerowait_ active 1: signals, that t zerowait is active after a motor stop. during this time, the motor is in stands till. r 10 vzero 1: signals, that the actual velocity is 0. r 9 position_ reached 1: signals, that the target position is reached. this flag becomes set while x actual and x target match. r 8 velocity_ reached 1: signals, that the target velocity is reac hed. this flag becomes set while v actual and vmax match. r+c 7 event_pos_ reached 1: signals, that the target position has been reached ( pos ition _reached becoming active). (flag and interrupt condition are cleared upon reading) this bit is ored to the in terrupt output signal. r+c 6 event_stop_ sg 1: signals an active stallguard2 stop event. reading the register will clear the stall condition and the motor may re - start mo tion, unless the motion controller has been stopped. (flag and interrupt condition ar e cleared upon reading) this bit is ored to the interrupt output signal. r 5 event_stop_r 1: signals an active stop right condition due to stop switch. the stop condition and the interrupt condition can be removed by setting ramp_mode to hold mode or by commanding a move to the opposite direction. in soft_stop mode, the condition will remain active until the motor has stopped motion into the direction of the stop switch. disabling the stop switch or the stop function also clears the flag, but the motor wi ll continue motion. this bit is ored to the interrupt output signal. 4 event_stop_l 1: signals an active stop left condition due to stop switch. the stop condition and the interrupt condition can be removed by setting ramp_mode to hold mode or by command ing a move to the opposite direction. in soft_stop mode, the condition will remain active until the motor has stopped motion into the direction of the stop switch. disabling the stop switch or the stop function also clears the flag, but the motor will cont inue motion. this bit is ored to the interrupt output signal. r+c 3 status_latch_r 1: latch right ready (enable position latching using switch_mode settings latch_r_active or latch_r_inactive ) (flag is cleared upon reading) 2 status_latch_l 1: latch l eft ready (enable position latching using switch_mode settings latch_l_active or latch_l_inactive ) (flag is cleared upon reading) r 1 status_stop_r reference switch right status (1=active) 0 status_stop_l reference switch left status (1=active)
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 40 www.trinamic.com 6.4 en coder registers e ncoder register set (0 x 380 x 3c) r/w addr n register description / bit names range [unit] rw 0x38 11 encmode encoder configuration and use of n channel see separate table! rw 0x39 32 x_enc actual encoder position (signed) - 2^31 +(2^31 ) - 1 w 0x3a 32 enc_const accumulation constant (signed) 16 bit integer part, 16 bit fractional part x_enc accumulates +/ - enc_const / (2^16* x_enc ) (binary) or +/ - enc_const / (10^4* x_enc ) (decimal) encmode bit enc_sel_decimal switches between decimal and binary setting. use the sign, to match rotation direction! binary: [steps/2^16] (0 32767.999847 ) decimal: (0 .0 32767. 9999 ) reset default = 1.0 (=65536) r+c 0x3b 1 enc_status bit 0: n_event 1: encoder n event detected. status bit is cleared on r ead: read (r) + clear (c) this bit is ored to the interrupt output signal. r 0x3c 32 enc_latch encoder position x_enc latched on n event
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 41 www.trinamic.com 6.4.1 e ncmode C encoder register 0 x 38 : encmode C e ncoder register bit name comment 10 enc_sel_decimal 0 encoder prescal er divisor binary mode: counts enc_const(fractional part) /65536 1 encoder prescaler divisor decimal mode: counts in enc_const(fractional part) /10000 9 latch_x_act 1: also latch x actual position together with x_enc . allows latching the ramp generato r position upon an n channel event as selected by pos_edge and neg_edge . 8 clr_enc_x 0 upon n event, x_enc becomes latched to enc_latch only 1 latch and additionally clear encoder counter x_enc at n - event 7 neg_edge n p n channel event sensitivity 6 pos_edge 0 0 n channel event is active during an active n event level 0 1 n channel is valid upon active going n event 1 0 n channel is valid upon inactive going n event 1 1 n channel is valid upon active going and inactive going n event 5 clr_on ce 1: latch or latch and c lear x_enc on the next n event following the write access 4 clr_cont 1: always latch or latch and clear x_enc upon an n event (once per revolution , it is recommended to combine this setting with edge sensitive n event ) 3 ignore_ ab 0 an n event occurs only when polarities given by pol_n , pol_a and pol_b match. 1 ignore a and b polarity for n channel event 2 pol_n defines active polarity of n (0= low active , 1= high active ) 1 pol_b required b polarity for an n channel event (0= neg., 1=pos.) 0 pol_a required a polarity for an n channel event (0=neg., 1=pos.)
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 42 www.trinamic.com 6.5 motor driver registers m icrostepping control register set ( 0 x 6 00 x 6b ) r/w addr n register description / bit names range [unit] w 0x 6 0 32 mslut[0] microstep table entr ies 031 each bit gives the difference between entry x and entry x+1 when combined with the cor - res ponding mslutsel w bits: 0: w = %00: - 1 %01: +0 %10: +1 %11: +2 1: w = %00: +0 %01: +1 %10: +2 %11: +3 this is the differential coding for the first quarter of a wave. start values for cur_a and cur_b are stored for mscnt position 0 in start_sin and start_sin90 . ofs31, ofs30, , ofs01, ofs00 ofs255, ofs254, , ofs225, ofs224 32x 0 or 1 reset default= sine wave table w 0x 6 1 0x 6 7 7 x 32 mslut[1.. .7] microstep table entries 32255 7x 32x 0 or 1 reset default= sine wave table w 0x 6 8 32 mslutsel this register defines four segments within each quarter mslut wave. four 2 bit entries determine the meaning of a 0 and a 1 bit in the corresponding segme nt of mslut . see separate table! 0 < x1 < x2 < x3 reset default= sine wave table w 0x 6 9 8 + 8 mslutstart bit 7 0: start_sin bit 23 16: start_sin90 start_sin gives the absolute current at microstep table entry 0. start_sin 90 gives the absolute current for mi crostep table entry at positions 256. start values are transferred to the micro step registers cur_a and cur_b , when ever the reference position mscnt =0 is passed. start_sin reset default =0 start_sin 90 reset default =247 r 0x 6 a 10 mscnt microstep c ounter. indicates actual position in the microstep table for cur_a . cur_b uses an offset of 256 (2 phase motor). hint: move to a position where mscnt is zero before re - initializing mslutstart or mslut and mslutsel . 01023 r 0x 6 b 9 + 9 mscuract bit 8 0: c ur_a (signed): actual microstep current for motor phase a as read from mslut (not scaled by current) bit 24 16: cur_b (signed): actual microstep current for motor phase b as read from mslut (not scaled by current) +/ - 0...255
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 43 www.trinamic.com d river register set ( 0 x 6c 0 x 7 f ) r/w addr n register description / bit names range [unit] rw 0x 6c 32 chopconf chopper and driver configuration see separate table! w 0x 6d 25 coolconf coolstep smart current control register and stallguard2 configuration see separate table! w 0x 6e 24 dcctrl dcstep ( dc ) automatic commutation configuration register (enable via pin dcen or via vdcmin ) : bit 9 0: dc_time : upper pwm on time limit for commutation ( dc_time * 1/f clk ). set slightly above effective blank time tbl . bit 23 dc_sg : max. pwm on time for step loss detection using dcstep stallguard2 in dcstep mode. ( dc_sg * 16/f clk ) set slightly higher than dc_ time /16 0=disable attention: using a higher microstep resolution or interpolated operation, dcstep delivers a better stall g ua rd signal . dc_sg is also available above vhigh if vhighfs is activated. fo r best result also set vhighchm. r 0x 6f 32 drv_ status stallguard2 value and driver error flags see separate table! w 0x70 22 pwmconf voltage pwm mode chopper configuration see s eparate table! reset default = 0x00050480 r 0x71 8 pwm_ scale actual pwm amplitude scaler (255=max. voltage ) in voltage mode pwm, this value allows to detect a motor stall. 0255 encm_ctrl encoder mode configuration for a special mode ( enc _commutatio n ) , not for normal use . bit 0: inv : invert encoder in put s bit 1: maxspeed : ignore step input . if set, the hold current ihold determines the motor current, unless a step source is activated. the direction in this mode is determined by the shaft bit in gconf or by the inv bit. r 0x73 20 lost_steps number of input steps skipped due to higher load in dcstep operation , if step input does not stop when dc_out is low . this counter wraps around after 2^ 20 steps. counts up or down depending on direction. only with sdmode=1.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 44 www.trinamic.com ????? ( 248 ? ??? ( 2 ? ?? ? ? 1024 + ?? 1024 ) ) ? 1 m icrostep table calculation fo r a sine wave equ ivalent to the power on default - i :[0 255] is the table index - the amplitude o f the wave is 248. the resulting maximum positive value is 247 and the maximum negative value is - 248. - the round function rounds values from 0.5 to 1.4999 to 1
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 45 www.trinamic.com 6.5.1 mslutsel C look up table s egmentation definition 0 x 6 8 : mslutsel C l ook up table segment ation definition bit name function comment 31 x3 lut segment 3 start the sine wave look up table can be divided into up to four segments using an individual step width control entry wx . the seg ment borders are selected by x1 , x2 and x3 . segment 0 goes from 0 to x1 - 1. segment 1 goes from x1 to x2 - 1. segment 2 goes from x2 to x3 - 1. segment 3 goes from x3 to 255. for defined response the values shall satisfy: 0< x1 < x2 < x3 30 29 28 27 26 25 24 23 x2 lut segment 2 start 22 21 20 19 18 17 16 15 x1 lut segment 1 start 14 13 12 11 10 9 8 7 w3 lut width select from ofs(x3) to ofs255 width control bit coding w0 w3 : %0 0: mslut entry 0, 1 select: - 1, +0 %01: mslut entry 0, 1 select: +0, +1 %10: mslut entry 0, 1 select: +1, +2 %11: mslut entry 0, 1 select: +2, +3 6 5 w2 lut width select from ofs(x2) to ofs(x3 - 1) 4 3 w1 lut width select from ofs(x1) to ofs(x 2 - 1) 2 1 w0 lut width select from ofs00 to ofs(x1 - 1) 0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 46 www.trinamic.com 6.5.2 chopconf C chopper configuration 0 x 6c : chopconf C c hopper c onfiguration bit name function comment 31 - - reserved, set to 0 30 diss2g short to gnd protection disable 0: short to gnd p rotection is on 1: short to gnd protection is disabled 29 dedge enable double edge step pulses 1: enable step impulse at each step edge to reduce step frequency requirement. 28 intpol interpolation to 256 microsteps 1: t he actual microstep resolution ( m res ) becomes extrapolated to 256 microsteps for smoothest motor operation (useful for step/dir operation, only) 27 mres3 mres micro step resolution %0000: native 256 microstep setting. normally u se this setting with the internal motion controller. 26 mr es2 25 mres1 24 mres0 %0001 %1000: 128, 64, 32, 16, 8, 4, 2, fullstep reduced microstep resolution esp. for step/dir operation. the resolution gives the number of microstep entries per sine quarter wave. the driver automatically uses microstep p ositions which result in a symmetrical wave, when choosing a lower microstep resolution. step width=2^ mres [microsteps] 23 sync3 sync pwm synchronization clock this register allows synchronization of the chopper for both phases of a two phase motor in ord er to avoid the occurrence of a beat, especially at low motor velocities. it is automatically switched off above vhigh . %0000: chopper sync function chopsync off %0001 %1111: synchronization with f sync = f clk /(sync*64) hint: set toff to a low value, so that the chopper cycle is ended, before the next sync clock pulse occurs. set for the double desired chopper frequency for chm =0, for the desired base chopper frequency for chm =1. 22 sync2 21 sync1 20 sync0 19 vhighchm high velocity chopper mode this bit enables switching to chm =1 and fd =0, when vhigh is exceeded. this way, a higher velocity can be achieved. can be combined with vhighfs =1. if set, the toff setting automatically becomes doubled during high velocity operation in order to avoid doub ling of the chopper frequency. 18 vhighfs high velocity fullstep selection this bit enables switching to fullstep, when vhigh is exceeded. switching takes place only at 45 position. the fullstep target current uses the current value from the microstep ta ble at the 45 position. 17 vsense sense resistor voltage based current scaling 0: low sensitivity, high sense resistor voltage 1: high sensitivity, low sense resistor voltage 16 tbl1 tbl blank time select %00 %11: set comparator blank time to 16, 24, 36 or 54 clocks hint : % 01 or % 10 is recommended for most applications 15 tbl0 14 chm chopper mode 0 standard mode (spreadcycle) 1 constant off time with fast decay time. fast decay time is also terminated when the negative nominal current is r eached. fast decay is after on time.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 47 www.trinamic.com 0 x 6c : chopconf C c hopper c onfiguration bit name function comment 13 rndtf random toff time 0 chopper off time is fixed as set by toff 1 random mode, toff is random modulated by dn clk = - 12 +3 clocks. disfdcc fast decay mode chm =1: disfdcc =1 disables current comparator usa ge for termi - nation of the fast decay cycle 11 fd3 tfd [3] chm =1: msb of fast decay time setting tfd 10 hend3 hend hysteresis low value offset sine wave offset chm =0 %0000 %1111: 1, 0, 1, , 12 hend2 8 hend1 7 hend0 chm =1 %0000 %1111: 1, 0, 1, , 12 hstrt2 hstrt hysteresis start value added to hend chm =0 %000 %111: add 1, 2, , 8 to hysteresis low value hend (1/512 of this setting adds to current setting) attention: effective hend+hstrt 16. hint: hysteresis decrement is done each 16 clocks 5 hstrt1 4 hstrt0 tfd [2..0] fast decay time setting chm =1 fast decay time setting (msb: fd3 ): %0000 %1111: tfd with n clk = 32* tfd (%0000: slow decay only) 3 toff3 toff off time and driver enable off time setting controls duration of slow decay phase n clk = 12 + 32* toff %0000: driver disable, all bridges off %0001: 1 C tbl %0010 %1111: 2 15 toff2 1 toff1 0 toff0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 48 www.trinamic.com 6.5.3 coolconf C smart energy control coolstep and stallguard2 0 x 6d : coolconf C s mart e nergy control cool s tep and stall g uard 2 bit name function comment - reserved set to 0 24 sfilt stallguard2 f ilter enable 0 standard mode, high time resolution for stallguard2 1 filtered mode, stallguard2 signal updated for each four fullsteps (resp. six fullsteps for 3 phase motor) only to compensate for motor pole tolerances 23 - reserved set to 0 22 sgt6 stallguard2 threshold value this signed value controls stallguard2 level for stall output and sets the optimum measurement range for readout. a lower value gives a higher sensitivity. zero is the starting value working with most motors. - 64 to +63: a hi gher value makes stallguard2 less sensi tive and requires more torque to indicate a stall. 21 sgt5 20 sgt4 19 sgt3 18 sgt2 17 sgt1 16 sgt0 15 seimin minimum current for smart current control 0: 1/2 of current setting ( irun ) 1: 1/4 of cur rent setting ( irun ) 14 sedn1 current down step speed %00: for each 32 stallguard2 values decrease by one %01: for each 8 stallguard2 values decrease by one %10: for each 2 stallguard2 values decrease by one %11: for each stallguard2 value decrease by one 13 sedn0 12 - reserved set to 0 11 semax3 stallguard2 hysteresis value for smart current control if the stallguard2 result is equal to or above ( semin + semax+ 1)*32, the motor current becomes decreased to save energy. %0000 %1111: 0 15 10 semax2 9 semax1 8 semax0 7 - reserved set to 0 6 seup1 current up step width current increment steps per measured stallguard2 value %00 %11: 1, 2, 4, 8 5 seup0 4 - reserved set to 0 3 semin3 minimum stallguard2 value for smart current control and smart current enable if the stallguard2 result falls below semin *32, the motor current becomes increased to reduce motor load angle. %0000: smart current control coolstep off %0001 %1111: 1 15 2 semin2 1 semin1 0 semin0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 49 www.trinamic.com 6.5.4 pwm conf C voltage p wm m ode stealthchop 0 x 70 : pwm conf C v oltage mode pwm stealth c hop bit name function comment - reserved set to 0 21 freewheel1 allows different standstill modes stand still option when motor current setting is zero ( i_hold =0) . %00: normal operation % 0 1: freewheeling % 10: coil shorted using ls drivers % 11: coil shorted using hs drivers 20 freewheel0 19 pwm_ symmetric force symmetric pwm 0 the pwm value may change within each pwm cycle (standard mode) 1 a symmetric pwm cycle is enforced 18 pw m_ autoscale pwm automatic amplitude scaling 0 user defined pwm amplitude. the current settings have no influence. 1 e nable automatic current control attention: when using a user defined sine wave table, the a mplitude of this sine wave table should not be less than 244. best results are obtained with 247 to 2 52 as peak values. 17 pwm_freq 1 pwm frequency selection % 00: f pwm = 2 /1024 f clk % 01: f pwm = 2 /683 f clk % 10: f pwm = 2 /512 f clk % 11: f pwm = 2 /410 f clk 16 pwm _freq0 15 pwm_ grad user defined amplitud e (gradient) or regulation loop gradient pwm_ autoscale=0 velocity dependent gradient for pwm amplitude: pwm_grad * 256 / tstep is added to pwm_ampl 14 13 12 11 pwm_ autoscale = 1 user defined maximum pwm amplitude change per half wave (1 to 15) 10 9 8 7 pwm_ ampl user defined amplitude (offset) pwm_ autoscale=0 user defined pwm amplitude offset (0 - 255 ) the resulting amplitude ( limited to 0255) is: pwm_ampl + pwm_grad * 256 / tstep 6 5 4 3 pwm_ autosca le = 1 user defined maximum pwm amplitude when switching back from current chopper mode to voltage pwm mode (switch over velocity defined by tpwmthrs) . do not set too low values, as the regulation cannot measure the current when the actual pwm value goes bel ow a setting specific value. settings above 0x40 recommended. 2 1 0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 50 www.trinamic.com 6.5.5 drv_status C stallguard2 value and driver error flags 0 x 6f : drv_status C stall g uard 2 value and driver err or flags bit name function comment 31 stst standstill indicator this flag indicates motor stand still in each operation mode. this occurs 2^20 clocks after the last step pulse. 30 olb open load indicator phase b 1: open load detected on phase a or b . hint: this is just an informative flag. the driver takes no action upon it. false detection may occur in fast motion and standstill. check during slow motion, only. 29 ola open load indicator phase a 28 s 2gb short to ground indicator phase b 1: short to gnd detected on phase a o r b. the driver becomes disabled. the fla gs stay active, until the driver is disabled by software ( toff =0) or by the enn input. 27 s 2ga short to ground indicator phase a 26 otpw overtemperature pre - warning flag 1: overtemperature pre - warning threshold is exceeded. the overtemperature pre - warni ng flag is common for both bridges . 25 ot overtemperature flag 1: overtemperature limit has been reached. drivers become disabled until otpw is also cleared due to cooling down of the ic. the overtemperature flag is common for both bridges . 24 stallguard stallguard2 status 1: motor stall detected ( sg_result =0) or dcstep stall in dcstep mode. 23 - reserved ignore these bits 22 21 20 cs actual actual motor current / smart energy current actual current control scaling, for monitoring smart energy c urrent scaling controlled via settings in register coolconf , or for monitoring the function of the automatic current scaling. 19 18 17 16 15 fsactive full step active indicator 1: indicates that the driver has switched to fullstep as de fi ned by chopper mode settings and velocity thre sholds. 14 - reserved ignore these bits 13 12 11 10 9 sg_ result stallguard2 result respectively pwm on time for coil a in stand still for motor temperature detection mechanical load measur ement: the stallguard2 result gives a means to measure mecha nical motor load. a higher value means lower mecha nical load. a value of 0 signals highest load. with opti mum sgt setting, this is an indicator for a motor stall. the stall detection compares s g_result to 0 in order to detect a stall. sg_result is used as a base for coolstep operation, by comparing it to a pro grammable upper and a lower limit. it is not applicable in stealthchop mode. sg_result is also applicable when dcstep is active . stallgua rd2 works best with microstep operation. temperature measurement: in standstill, no stallguard2 result can be obtained. sg_result shows the chopper on - time for motor coil a instead. if the motor is moved to a determined micro step position at a certain cu rrent setting, a comparison of the chopper on - time can help to get a rough estimation of motor temperature. as the motor heats up, its coil resistance rises and the chopper on - time increases. 8 7 6 5 4 3 2 1 0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 51 www.trinamic.com 7 stealthc hop? stealthchop is an extremely quiet mode of operation for stepper motors . it is based on a voltage mode pwm . in case of standstill and at low velocities, th e motor is absolutely noiseless. thus , stealthchop operated stepper motor applications are very suitable for indoor or home use. t he motor operates absolutely free of vibration at low velocities. with stealthchop, the motor current is applied by driving a certain effective voltage into the coil, using a voltage mode pwm . there are no more configurati ons required except for the pwm voltage regulator response to a change of motor current . two algorithms are provided, a manual and an automatic mode. figure 7 . 1 motor coil sine wave current with stealthchop (measured with current probe) 7.1 two modes for current regulation in order to match the motor current to a certain level, the stealthchop pwm voltage must be scaled depending on the actual motor velocity. several additional factors influence the required vol tage level to drive the motor at the target current: the motor resistance, its back emf (i.e. directly proportional to its velocity) as well as actual level of the supply voltage. for the ease of use, two modes of pwm regulation are provided: an automatic mode using current feedback ( pwm_autoscale = 1) and a feed forward velocity controlled mode ( pwm_autoscale = 0). the feed forward velocity controlled mode will not react to a change of the supply voltage or to events like a motor stall, but it provides ver y stable amplitude. it does not use nor require any means of current measurement. this is perfect when motor type and supply voltage are well known. since this mode does not measure the actual current, it will not respond to modification of the current set ting, like stand still current reduction. therefore we recommend the automatic mode, unless current regulation is not satisfying in the given operating conditions. the pwm frequency can be chosen in a range in four steps in order to adapt the frequency div ider to the frequency of the clock source. a setting in the range of 30 - 5 0khz is good for many applications. it balances low current ripple and good higher velocity performance vs. dynamic power dissipation. c hoice of pwm frequency for stealt h c hop clock f requency f clk pwm_freq=%00 f pwm =2 /1024 f clk pwm_freq=%01 f pwm = 2 /683 f clk pwm_freq=%10 f pwm = 2 /512 f clk pwm_freq=%11 f pwm = 2 /410 f clk 18mhz 35.2khz 52.7khz 70.3khz 87.8khz 16mhz 31.3khz 46.9khz 62.5khz 78.0khz (internal) ? ? ? ? table 7 . 1 choice of pwm frequency C green : recommended
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 52 www.trinamic.com 7.2 automatic scaling in stealthchop voltage p wm mode, the autoscaling function ( pwm_autoscale = 1) regulates the motor current to the desired current setting. the driver measures the motor current during the chopper on time and uses a proportional regulator to regulate the pwm_scale in order match th e motor current to the target current. pwm_grad is the proportionality coefficient for this regulator. basically, the proportionality coefficient should be as small as possible in order to get a stable and soft regulation behavior, but it must be large eno ugh to allow the driver to quickly react to changes caused by variation of the motor target current, the motor velocity or effects resulting from changes of the supply voltage. as the supply voltage level and motor temperature normally change only slowly, a minimum setting of the regulation gradient often is sufficient ( pwm_grad =1). if stealthchop operation is desired for a higher velocity range, variations of the motor back emf caused by motor acceleration and deceleration may require a quicker regulation. therefore, pwm_grad setting should be optimized for the fastest required acceleration and deceleration ramp (see figure 7 . 4 ). the quality of a given setting can be examined when monitoring pwm_scale and motor velocity. just as in the acceleration phase , during a deceleration phase the voltage pwm amplitude must be adapted in order to keep the motor coil current constant. when the upper acceleration and the upper deceleration used in the application are identical, the value determi ned for the acceleration phase will already be optimum for both. figure 7 . 2 scope shot: good setting for pwm_grad figure 7 . 3 scope shot: too small setting f or pwm_grad
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 53 www.trinamic.com figure 7 . 4 good and too small setting for pwm_grad be sure to use a symmetrical sense resistor layout and sense resistor traces of identical length and well matching sense resistors for best performance. quick s tart for a quick start, see the quick configuration guide in chapter 24 . 7.2.1 lower current limit the stealthchop current regulator imposes a lower limit for motor current regulation. a s the coil current can be measured in the shunt resistor during chopper on phase only, a minimum chopper duty cycle allowing coil current regulation is given by the blank time as set by tbl and by the chopper frequency setting. therefore, the motor specifi c minimum coil current in stealthchop autoscaling mode rises with the supply voltage and with the chopper frequency . a lower blanking time allows a lower current limit. extremely low currents (e.g. for standstill power down) can be realized with the non - au tomatic current scaling or with the freewheeling option, only. the run current setting needs to be kept above the lower limit: in case the pwm_scale drops to a too low value, e.g. because the current scale was too low, the regulator may not be able to reco ver. the regulator will recover once the motor is in standstill. the freewheeling option allows going to zero motor current . the lower motor coil current limit can be calculated from motor parameters and chopper settings: v e l o c i t y t i m e s t a n d s t i l l p w m s c a l e p w m r e a c h e s m a x . a m p l i t u d e 2 5 5 0 m o t o r c u r r e n t n o m i n a l c u r r e n t ( s i n e w a v e r m s ) r m s c u r r e n t c o n s t a n t 0 p w m s c a l e c u r r e n t m a y d r o p d u e t o h i g h v e l o c i t y v e l o c i t y t i m e s t a n d s t i l l p w m s c a l e 2 5 5 0 m o t o r c u r r e n t n o m i n a l c u r r e n t ( s i n e w a v e r m s ) 0 p w m s c a l e p w m _ g r a d t o o s m a l l p w m _ g r a d o k c u r r e n t d r o p s d u e t o t o o s m a l l p w m _ g r a d c u r r e n t o v e r s h o o t s d u e t o t o o s m a l l p w m _ g r a d p w m _ g r a d o k s e t t i n g f o r p w m _ g r a d o k . s e t t i n g f o r p w m _ g r a d s l i g h t l y t o o s m a l l .
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 54 www.trinamic.com ? ????? ????? = ? ????? ? ? ??? ? ? ? ? ???? with v m the motor supply voltage and r coil the motor coil resistance. i lower limit can be treated as a thumb value for the minimum possible motor current setting. e xample : a motor has a coil resistance of 5?, the supply voltage is 24v. with tbl =%01 and pwm_freq =%00, t blank is 24 clock cycles, f pwm is 2/(1024 clock cycles): ? ????? ????? = 24 ? ??? ? 2 1024 ? ??? ? 24 ? 5? = 24 512 ? 24 ? 5? = 225 ?? thi s means, the motor target current must be 225ma or more, taking into account all relevant settings. this lower current limit also applies for modification of the motor current via the analog input vref. for pwm_autoscale mode, a lower coil current limit a pplies. this limit can be calculated or measured using a current probe. keep the motor run - current setting irun well above this lower current limit. 7.2.2 acceleration in automatic current regulation mode ( pwm_autoscale = 1), the pwm_grad setting should be opt imized for the fastest required acceleration ramp. use a current probe and check the motor current during (quick) acceleration. a setting of 1 may result in a too slow regulation, while a setting of 15 responds quickly to velocity changes, but might produc e regulation instabilities in some constellations. a setting of 4 is a good starting value. hint operate the motor within your application when exploring stealthchop. motor performance often is better with a mechanical load, because it prevents the motor from stalling due mechanical oscillations which can occur without load. 7.3 velocity based scaling velocity based scaling scales the stealthchop amplitude based on the time between each two steps, i.e. based on tstep , measured in clock cycles . this concept bas ically does not require a current measurement, because no regulation loop is necessary. the idea is a linear approximation of the voltage required to drive the target current into the motor. the stepper motor has a certain coil resistance and thus needs a certain voltage amplitude to yield a target current based on the basic formula i=u/r. with r being the coil resistance, u the supply voltage scaled by the pwm value, the current i results. the initial value for pwm_ampl can be calculated: ??? _ ???? = 374 ? ? ???? ? ? ???? ? ? with v m the motor supply voltage and i coil the target rms current the effective pwm voltage u pwm (1/sqrt(2) x peak value) results considering the 8 bit resolution and 248 sine wave peak for the actual pwm amplitu de shown as pwm_s cale : ? ??? = ? ? ? ??? _ ????? 256 ? 248 256 ? 1 2 = ? ? ? ??? _ ????? 374
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 55 www.trinamic.com with rising motor velocity, the motor generates an increasing back emf voltage. the back emf voltage is proportional to the motor veloc ity. it reduces the pwm voltage effective at the coil resistance and thus current decreases. the tmc 5130a provides a second velocity dependent factor ( pwm_grad ) to compensate for this. the overall effective pwm amplitude ( pwm_s cale ) in this mode automatica lly is calculated in dependence of the microstep frequency as: ??? _ ????? = ??? _ ???? + ??? _ ???? ? 256 ? ? ???? ? ??? with f step being the microstep frequency for 256 microstep resolution equivalent and f clk the clock frequency supplied to the driver or the actual internal frequency as a f irst approximation, the back emf subtracts from the supply voltage and thus the effective current amplitude decreases. this way, a first approximation for pwm_grad setting can be calculated: ??? _ ???? = ? ???? [ ? ??? ? ] ? 2 ? ? ? ??? ? 1 . 46 ? ? ? ???? c bemf is the back emf constant of the motor in volts per radian/second . mspr is the number of microsteps per rotation, e.g. 51200 = 256steps multiplied by 200 fullsteps for a 1.8 motor. figure 7 . 5 velocity based pwm scaling (pwm_autoscale=0) hint the values for pwm_ampl and pwm_grad can easily be optimized by tracing the motor current with a current probe on the oscilloscope. it is not even necessary to calculate the formulas if you carefully start with a low setting for both. u nderstanding t he back emf constant of a motor the back emf constant is the voltage a motor generates when turned with a certain velocity. often motor datasheets do not specify t his value, as it can be deducted from motor torque and coil current rating. within si units, the numeric value of the back emf constant c bemf has the same numeric value as the numeric value of the torque constant. for example, a motor with a torque constan t of 1 nm/a would have a c bemf of 1v/rad/s. turning such a motor with 1 rps (1 rps = 1 revolution per second = 6.28 rad/s) generates a back emf voltage of 6.28v. thus, the back emf constant can be calculated as: p w m s c a l i n g ( p w m _ s t a t u s ) v e l o c i t y p w m _ a m p l p w m r e a c h e s m a x . a m p l i t u d e 2 5 5 0 p w m _ g r a d m o t o r c u r r e n t n o m i n a l c u r r e n t ( e . g . s i n e w a v e r m s ) c u r r e n t d r o p s ( d e p e n d s o n m o t o r l o a d ) c o n s t a n t m o t o r r m s c u r r e n t 0 v p w m m a x
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 56 www.trinamic.com ? ???? [ ? ??? / ? ] = ????????????? [ ?? ] 2 ? ? ??????? [ ? ] i coilnom is the motors rated phase current for the specified holding torque holdingtorque is the motor specific holding torque, i.e. the torque reached at i coilnom on both coils. the torque unit is [nm] where 1nm = 100ncm = 1000mnm. the voltage is valid as rms voltage per coil, thus the nominal current is multiplied by 2 in this formula, since the nominal current assumes a full step position, with two coils operating . 7.4 combining stealthchop and spreadcycle for applications requiring high velocity motion , spreadcycle may bring more stable operation in the upper velocity range. t o combine no - noise operation with highest dynamic performance, combine stealthchop and sprea dcycl e based on a velocity threshold ( tpwmthrs ) . with this, stealthchop is only active at low velocities. as a first step, both chopper principles should be parameterized and optimized individually. in a next step, a transfer velocity has to be fixed. for example, stealthchop operation is used for precise low speed positioning, while spreadcycle shall be used for highly dynamic motion. tpwmthrs determines the transition velocity. use a low transfer velocity to avoid a jerk at the switching point. a jerk o ccurs when switching at higher velocities, because the back - emf of the motor (which rises with the velocity) causes a phase shift of up to 90 between motor voltage and motor current. so when switching at higher velocities between voltage pwm and current p wm mode, this jerk will occur with increased intensity. a high jerk may even produce a temporary overcurrent condition (depending on the motor coil resistance). at low velocities (e.g. 1 to a few 10 rpm), it can be completely neglected for most motors. the refore, consider the switching jerk when choosing tpwmthrs . set tpwmthrs zero if you want to work with stealthchop only. when enabling the stealthchop mode the first time using automatic current regulation, the motor must be at stand still in order to allo w a proper current regulation. when the drive switches to a different chopper mode at a higher velocity, stealthchop logic stores the last current regulation setting until the motor returns to a lower velocity again. this way, the regulation has a known st arting point when returning to a lower velocity, where stealthchop becomes re - enabled. therefore, neither the velocity threshold nor the supply voltage must be considerably changed during the phase while the chopper is switched to a different mode, because otherwise the motor might lose steps or the instantaneous current might be too high or too low. a motor stall or a sudden change in the motor velocity may lead to the driver detecting a short circuit or to a state of automatic current regulation, from whi ch it cannot recover. clear the error flags and restart the motor from zero velocity to recover from this situation. hint start the motor from standstill when switching on stealthchop the first time and keep it stopped for at least 128 chopper periods to allow stealthchop to do initial standstill current control. 7.4.1 pwm_ampl limits jerk when combining stealthchop with spreadcycle or constant off time classic pwm, a switching velocity can be chosen using t pwm thrs . with this, stealthchop is only active at low velocities. often, a very low velocity in the range of 1 to a few 10 rpm fits best. in case a high switching velocity is chosen, special care should be taken for switching back to stealthchop during deceleration, because the phase jerk can produce a short time overcurrent. to avoid a short time overcurrent and to minimize the jerk, the initial amplitude for switching back to stealthchop at sinking velocity can be determined using the setting pwm_ampl . tune pwm_ampl to a value which gives a smooth and safe transition back to stealthchop within the application. as a thumb rule, ? to ? of the last pwm_s cale value which was valid after the switching event at rising velocity can be used. for high resistive steppers as well as for low transfer velocities (as set by tpwm thrs ), set pwm_ampl to 255 as most universal setting.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 57 www.trinamic.com hint in case the automatic scaling regulation is instable at your desired motion velocity, try modifying the chopper frequency divider pwm_freq . also adapt the blank time tbl and motor current for best result. 7.5 flags in stealthchop as stealthchop uses voltage mode driving, status flags based on current measurement respond slower, respectively the driver reacts delayed to sudden changes of back emf, like on a motor stall. a motor stall can lead to an overcurrent condition. depending on the previous motor velocity, and on the coil resistance of the motor, it may trigger the overcurrent detection . with low velocities, where the back emf is just a fraction of the supply voltage, there is no danger o f triggering the short detection. 7.5.1 open load flags in stealthchop mode, status information is different from the cycle - by - cycle regulated chopper modes. ola and olb show if the current regulation sees that the nominal current can be reached on both coils. - a flickering ola or olb can result from asymmetries in the sense resistors or in the motor coils. - an interrupted motor coil leads to a continuously active open load flag for the coil. - one or b oth flags are active, if the current regulation did not succ eed in scaling up to the full target current within the last few fullsteps (because no motor is attached or a high velocity exceeds the pwm limit ). if desired, do an on - demand open load test using the spreadcycle chopper, as it delivers the safest result . with stealthchop, pwm_scale can be checked to detect the correct coil resistance . 7.5.2 pwm_scale i nforms a bout the motor s tate information about the motor state is available with automatic scaling by reading out pwm_s cale . as this parameter reflects the act ual voltage required to drive the target current into the motor, it depends on several factors: m otor load, coil resistance , supply voltage, and current setting. therefore, an evaluation of the pwm_s cale value allows seeing the motor load ( similar to stall guard 2) and finding out if the target current can be reached. it even gives an idea on the motor temperature (evaluate at a well - known state of operation).
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 58 www.trinamic.com 7.6 freewheeling and passive b raking stealthchop provides different options for motor standstill. the se options can be enabled by setting the standstill current ihold to zero and choosing the desired option using the freewheel setting. the desired option becomes enabled after a time period specified by t powerdown and ihold_delay . the pwm_scale regulation becomes frozen once the motor target current is at zero current in order to ensure a quick startup. parameter description setting comment en_pwm_ mode general enable for use of stealthchop (register gconf ) 0 do not use stealthchop 1 stealthchop enabl ed tpwmthrs specifies the upper velocity for operation in stealthchop voltage pwm mode. entry the tstep reading (time between two microsteps) when operating at the desired threshold velocity. 0 tstep falls below t coolthrs or thigh pwm_ autoscale enable automatic current scaling using current measurement or use forward controlled velocity based mode. 0 forward controlled mode 1 automatic scaling with current regulator pwm_freq pwm frequency selection. use the lowest setting giving good results. the frequency measured at each of the chopper outputs is half of the effective chopper frequency f pwm . 0 f pwm = 2 /1024 f clk 1 f pwm =2 /683 f clk 2 f pwm = 2 /512 f clk 3 f pwm =2 /410 f clk pwm_grad user defined pwm amplitu de (gradient) for velocity based scaling or regulation loop gradient when pwm_autoscale =1. 1 15 pwm_autoscale =1 0 255 pwm_autoscale =0 pwm_ampl user defined pwm amplitude (offset) for velocity based scaling or amplitude limit for re - entry into stealthchop mode when pwm_autoscale =1. 0 255 pwm_ symmetric activate to force a symmetric pwm for each cycle. reduces the number of updates to the pwm cycle. special use only. 0 normal operation 1 a symmetric pwm cycle is enforced freewheel s tand still option when motor current setting is zero ( i_hold =0). only available with stealthchop enabled. the freewheeling option makes the motor easy movable, while both coil short options realize a passive brake. mode 2 will brake more intensely than mod e 3, because low side drivers (ls) have lower resistance than high side drivers. 0 normal operation 1 freewheeling 2 coil shorted using ls drivers 3 coil shorted using hs drivers pwm_scale read back of the actual stealthchop voltage pwm scaling a s determined by the current regulation. can be used to detect motor load and stall when autoscale =1. 0 255 toff general enable for the motor driver, the actual value does not influence stealthchop 0 driver off 1 15 tbl comparator blank time . this time needs to safely cover the switching event and the duration of the ringing on the sense resistor. choose a setting of 1 or 2 for typical applications . for higher capacitive loads, 3 may be required. lower settings allow stealthchop to regulate down to lower coil current values. 0 16 t clk 1 24 t clk 2 36 t clk 3 54 t clk irun ihold run and hold current setting for stealth chop operation C pwm_a utoscale =1 see chapter on current setting for details
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 59 www.trinamic.com 8 spreadcycle and classic chopper whil e stealthchop is a voltage mode pwm controlled chopper, spreadcycle is a cycle - by - cycle current control. therefore, it can react extremely fast to cha nges in motor velocity or motor load. the currents through both motor coils are controlled using choppers. the choppers work independently of each other. in figure 8 . 1 the different chopper phases are shown. figure 8 . 1 chopper phases although the current could be regulated using only on phases and fast decay phases, insertion of the slow decay phase is important to reduce electrical losses and current rip ple in the motor. the duration of the slow decay phase is specified in a control parameter and sets an upper limit on the chopper frequency. the current comparator can measure coil current during phases when the current flows through the sense resistor, bu t not during the slow decay phase, so the slow decay phase is terminated by a timer. the on phase is terminated by the comparator when the current through the coil reaches the target current. the fast decay phase may be terminated by either the comparator or another timer. when the coil current is switched, spikes at the sense resistors occur due to charging and discharging parasitic capacitances. during this time, typically one or two microseconds, the current cannot be measured. blanking is the time when the input to the comparator is masked to block these spikes. there are two cycle - by - cycle chopper modes available: a new high - performance chopper algorithm called spreadcycle and a proven constant off - time chopper mode. the constant off - time mode cycles th rough three phases: on, fast decay, and slow decay. the spreadcycle mode cycles through four phases: on, slow decay, fast decay, and a second slow decay. the chopper frequency is an important parameter for a chopped motor driver. a too low frequency might generate audible noise. a higher frequency reduces current ripple in the motor, but with a too high frequency magnetic losses may rise. also power dissipation in the driver rises with increasing frequency due to the increased influence of switching slopes causing dynamic dissipation. therefore, a compromise needs to be found. most motors are optimally working in a frequency range of 16 khz to 3 0 khz. the chopper frequency is influenced by a number of parameter settings as well as by the motor inductivity an d supply voltage. hint a chopper frequency in the range of 16 khz to 3 0 khz gives a good result for most motors when using spreadcycle. a higher frequency leads to increased switching losses. r s e n s e i c o i l o n p h a s e : c u r r e n t f l o w s i n d i r e c t i o n o f t a r g e t c u r r e n t r s e n s e i c o i l f a s t d e c a y p h a s e : c u r r e n t f l o w s i n o p p o s i t e d i r e c t i o n o f t a r g e t c u r r e n t r s e n s e i c o i l s l o w d e c a y p h a s e : c u r r e n t r e - c i r c u l a t i o n + v m + v m + v m
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 60 www.trinamic.com three parameters are used for controlling both chopper mod es: 8.1 spreadcycle chopper the spreadcycle (patented ) chopper algorithm is a prec ise and simple to use chopper mode which automatically determines the optimum length for the fast - decay phase. the spreadcycle will provide superior microstepping quality even with default settings . se veral parameters are available to optimize the chopper to the application. each chopper cycle is comprised of an on phase, a slow decay phase, a fast decay phase and a second slow decay phase (see figure 8 . 3 ). the two slow decay phases and the two blank times per chopper cycle put an upper limit to the chopper frequency . the slow decay phases typically make up for about 3 0% - 7 0 % of the chopper cycle in standstill and are important for low motor and driver power dissipation. calculation of a starting value for the slow decay time toff : e xample : target chopper frequency: 25khz . assumption: two slow decay cycles make up for 50% of overall chopper cycle time ? ??? = 1 25 ??? ? 50 100 ? 1 2 = 10 ? for the toff setting this means: ???? = ( ? ??? ? ? ??? ? 12 ) / 32 with 1 2 mhz clock this gives a setting of toff=3.4, i.e. 3 or 4. with 16 mhz clock this gives a setting of toff=4.6, i.e. 4 or 5. the hysteresis start setting forc es the driver to introduce a minimum amount of current ripple into the motor coils. the current ripple must be higher than the current ripple which is caused by resistive losses in the motor in order to give best microstepping results. this will allow the chopper to precisely regulate the current both for rising and for falling target current. the ti me required to introduce the current ripple into the motor coil also reduces the chopper frequency . therefore, a higher hysteresis setting will lead to a lower chopper frequency. the motor inductance limits the ability of the chopper to follow a changing m otor current. further t he duration of the on phase and the fast decay must be longer than the blanking time, because the current comparator is disabled during blanking. parameter description setting comment toff sets the slow decay time ( off time ). this setting also limits the maximum chopper frequency. for operation with stealthchop, this parameter is not used, but it is required to enable the motor. in case of ope ration with stealthchop only, any setting is ok. setting this parameter to zero completely disables all driver transistors and the motor can free - wheel. 0 chopper off 115 clk = 12 + 32* toff (1 will work with minimum blank time of 24 clocks) tbl selects the comparator blank time . this time needs to safely cover the switching event and the duration of the ringing on the sense resistor. for most applications, a setting of 1 or 2 is good. for highly capacitive loads, e.g. when filter net works are used, a setting of 2 or 3 will be required. 0 16 t clk 1 24 t clk 2 36 t clk 3 54 t clk chm selection of the chopper mode 0 spreadcycle 1 classic const. off time
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 61 www.trinamic.com it is easiest to find the best setting by starting from a low hysteresis setting (e.g . hstrt =0, hend =0) and increasing hstrt , until the motor runs smooth ly at low velocity settings . this can best be checked when measuring the motor current either with a current probe or by probing the sense resistor voltages (see figure 8 . 2 ). c hecking the sine wave shape near zero transition will show a small ledge between both half waves in case the hysteresis setting is too small . at medium velocities (i.e. 100 to 400 fullsteps per second) , a too low hysteresis setting will lead to increased humming and vibration of the motor. figure 8 . 2 n o ledges in current wave with sufficient hysteresis (magenta: current a, yellow & blue: sense resistor voltages a and b) a too high hysteresis setting will lead to reduced chopper frequency and increased chopper noise but will not yield any benefit for the wave shape. quick s tart for a quick start, see the quick configuration guide in chapter 24 . for detail procedure see application note an00 1 - parameterization of spreadcycle as experiments show, the setting is quite independent of the motor, because higher current motors typically also have a lower coil resistance. therefore c hoosing a low to medium default value f or the hysteresis (for example, effective hysteresis = 4 ) normally fits most applications. the setting can be optimized by experimenting with the motor: a too low setting will result in reduced microstep accuracy, while a too high setting will lead to more chopper noise and motor power dissipation. when measuring the sense resistor voltage in motor standstill at a medium coil current with an oscilloscope, a too low setting shows a fast decay phase not longer than the blanking time. when the fast decay time becomes slightly longer than the blanking time, the setting is optimum. you can reduce the off - time setting, if this is hard to reach. the hysteresis principle could in some cases lead to the chopper frequency becoming too low, e.g. when the coil resistan ce is high when compared to the supply voltage. this is avoided by splitting the hysteresis setting into a start setting ( hstrt+hend ) and an end setting ( hend ). an automatic hysteresis decrementer (hdec) interpolates between both settings, by decrementing the hysteresis value stepwise each 16 system clocks. at the beginning of each chopper cycle, the hysteresis begins with a value which is the sum of the start and the end values ( hstrt + hend ), and decrements during the cycle, until either the chopper cycle e nds or the hysteresis end value ( hend ) is reached. this way, the chopper frequency is stabilized at high amplitudes and low supply voltage situations, if the frequency gets too low. this avoids the frequency reaching the audible range.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 62 www.trinamic.com figure 8 . 3 spreadcycle chopper scheme showing coil current during a chopper cycle two parameters control spreadcycle mode: parameter description setting comment hstrt hysteresis start setting. this value is an offset from the hysteresis end value hend . 07 hstrt =18 hend hysteresis end setting. sets the hysteresis end value after a number of decrements. the sum hstrt + hend must be 02 3 415 112: positive hend e xample : a hysteresis of 4 has been chosen. you might decide to not use hysteresis decrement. in this case set: hend =6 (sets an effective end value of 6 - 3=3) hstrt =0 (sets minimum hysteresis, i.e. 1: 3+1=4) in order to take advantage of the variable hysteresis, we can set most of the value to the hst rt, i.e. 4, and the remaining 1 to hysteresis end. the resulting configuration register values are as follows: hend =0 (sets an effective end value of - 3) hstrt =6 (sets an effective start value of hysteresis end +7: 7 - 3=4) hint highest motor velocities sometimes benefit from setting toff to 1 or 2 and a short tbl of 1 or 0. t i t a r g e t c u r r e n t t a r g e t c u r r e n t - h y s t e r e s i s s t a r t t a r g e t c u r r e n t + h y s t e r e s i s s t a r t o n s d f d s d t a r g e t c u r r e n t + h y s t e r e s i s e n d t a r g e t c u r r e n t - h y s t e r e s i s e n d h d e c
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 63 www.trinamic.com 8.2 classic constant off time chopper the classic constant off time chopper is an alternative to spreadcycle. perfectly tuned, it also gives good results. in combination with rdson curr ent sensing without external sense resistors, this chopper mode can bring a benefit with regard to audible high - pitch chopper noise. also, the classic constant off time chopper (automatically) is used in combination with fullstepping in dcstep operation. the classic constant off - time chopper uses a fixed - time fast decay following each on phase. while the duration of the on phase is determined by the chopper comparator, the fast decay time needs to be long enough for the driver to follow the falling slope o f the sine wave, but it should not be so long that it causes excess motor current ripple and power dissipation. this can be tuned using an oscilloscope or evaluating motor smoothness at different velocities. a good starting value is a fast decay time setti ng similar to the slow decay time setting. f igure 8 . 4 classic const. off time chopper with offset showing coil current after tuning the fast decay time, the offset should be tune d for a smooth zero crossing. this is necessary because the fast decay phase makes the absolute value of the motor current lower than the target current (see figure 8 . 5 ). if the zero offset is too low, the motor stands still for a short moment during current zero crossing. if it is set too high, it makes a larger microstep. typically, a positive offset setting is required for smoothest operation. figure 8 . 5 zero crossing with classic chopper and correction using sine wave offset three parameters control constant off - time mode: t i m e a n v a l u e = t a r g e t c u r r e n t t a r g e t c u r r e n t + o f f s e t o n s d f d s d o n f d t i t a r g e t c u r r e n t c o i l c u r r e n t t i t a r g e t c u r r e n t c o i l c u r r e n t c o i l c u r r e n t d o e s n o t h a v e o p t i m u m s h a p e t a r g e t c u r r e n t c o r r e c t e d f o r o p t i m u m s h a p e o f c o i l c u r r e n t
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 64 www.trinamic.com parameter description setting comment tfd ( fd3 & hstrt ) fast decay time setting. with chm=1, these bits control the portion of fa st decay for each chopper cycle. 0 slow decay only 115 offset ( hend ) sine wave offset . with chm=1, these bits control the sine wave offset. a positive offset corrects for zero crossing error. 02 3 415 positive offset 112 disfdcc selects usage of the current comparator for termination of the fast decay cycle. if current comparator is enabled, it terminates the fast decay cycle in case the current reaches a higher negative value t han the actual positive value. 0 enable comparator termination of fast decay cycle 1 end by time only 8.3 random off time in the constant off - time chopper mode, both coil choppers run freely without synchronization. the frequency of each chopper mainly de pends on the coil current and the motor coil inductance. the inductance varies with the microstep position. with some motors, a slightly audible beat can occur between the chopper frequencies when they are close together. this typically occurs at a few mic rostep positions within each quarter wave. this effect is usually not audible when compared to mechanical noise generated by ball bearings, etc. another factor which can cause a similar effect is a poor layout of the sense resistor gnd connections. hint a common factor, which can cause motor noise, is a bad pcb layout causing coupling of both sense resistor voltages (please refer layout hint s in chapter 31 ). to minimize the effect of a beat between both chopper frequencies, an internal random generator is provided. it modulates the slow decay time setting when switched on by the rndtf bit. the rndtf feature further spreads the chopper spectrum, reducing electromagnetic emission on single frequencies. parameter description sett ing comment rndtf this bit switches on a random off time generator, which slightly modulates the off time toff using a random polynomial. 0 disable 1 random modulation enable
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 65 www.trinamic.com 8.4 chopsync2 for quiet 2 - phase motor chopsync2 is an alternative add - on con cept for spreadcycle chopper and constant off time chopper to optimize motor noise at low velocities. when using stealthchop for low velocity operation, chopsync2 is not applicable. while a frequency adaptive chopper like spreadcycle provides excellent h igh velocity operation, in some applications, a constant frequency chopper is preferred rather than a frequency adaptive chopper. this may be due to chopper noise in motor standstill, or due to electro - magnetic emission. chopsync 2 provides a means to synch ronize the choppers for both coils with a common clock, by extending the off time of the coils. it integrates with both chopper principles. however, a careful set up of the chopper is necessary, because chopsync2 can just increment the off times, but not r educe the duration of the chopper cycles themselves. therefore, it is necessary to test successful operation best with an oscilloscope. set up the chopper as detailed above, but take care to have chopper frequency higher than the chopsync2 frequency. as hi gh motor velocities take advantage of the normal, adaptive chopper style, chopsync2 becomes automatically switched off using the vhigh velocity limit programmed within the motion controller. e xample : the motor is operated in spreadcycle mode ( chm =0). the minimum chopper frequency for standstill and slow motion (up to vhigh ) has been determined to be 25 khz under worst case operation conditions (hot motor, low supply voltage). the standstill noise needs to be minimized by using chopsync. the ic use s an external 16 mhz clock. considering the chopper mode 0, sync has to be set for the closest value resulting in or below the double frequency, e.g. 50 khz. using above formula, a value of 5 results exactly and can be used. trying a value of 6, a frequen cy of 41.7 khz results, which still gives an effective chopper frequency of slightly above 20 khz, and thus would also be a valid solution. a value of 7 might still be good, but could already give high frequency noise. in chopper mode 1, sync could be set to any value between 10 and 13 to be within the chopper frequency range of 19.8 khz to 25 khz. parameter description setting comment sync this register allows synchronization of the chopper for both phases of a two phase motor in order to avoid the occur rence of a beat, especially at low motor velocities. it is automatically switched off above vhigh . hint: set toff to a low value, so that the chopper cycle is ended, before the next sync clock pulse occurs. set sync for the double desired chopper frequen cy for chm =0, for the desired base chopper frequency for chm =1. 0 chopsync off 115 clk /64 clk /(15*64) ? ??? = ? ? ??? 64 ? ? ???? ? a suitable chopsync2 sync value can be calculated as follows:
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 66 www.trinamic.com 9 analog current c ontrol ain when a high flexibility of the output current scaling is desired, the analog input of the driver can be enabled f or current control, rather than choosing a different set of sense resistors or scaling down the run current via irun parameter. this way, a simple voltage divider can be used for the adaptation of a boa rd to different motors . ain s cales the m otor c urrent the tmc 5130a provides an internal reference voltage for current control, directly derived from the 5vout supply output. alternatively, an external reference voltage can be used. this reference voltage becomes scaled down for the chopper comparators. the ch opper comparators compare the voltages on bra and brb to the scaled reference voltage for current regulation. when i_scale_analog in gconf is enabled, the external voltage on ain is amplified and filtered and becomes used as reference voltage. a voltage of 2.5v (or any voltage between 2.5v and 5v) gives the same current scaling as the internal reference voltage . a voltage between 0v and 2.5v linearly scales the current between 0 and the current scaling defined by the sense resistor setting. it is not advise d to work with reference voltages below about 0.5v to 1v , because relative analog noise caused by digital circuitry has a n increased impact on the chopper precision at low ain voltages. for best precision, choose the sense resistors in a way that the desir ed maximum current is reached with ain in the range 2v to 2. 4 v. be sure to optimize the chopper settings for the normal run current of the motor. d riving ain the easiest way to provide a voltage to ain is to use a voltage divider from a stable supply vol tage or a microcontrollers dac output. a pwm signal can also be used for current control . the pwm becomes transformed to an analog voltage using an additional r/c low - pass at the ain pin . the pwm duty cycle controls the analog v oltage . choose the r and c values to form a low pass with a corner frequency of several milliseconds while using pwm frequencies well above 10 khz. ain additionally provides an internal low - pass filter with 3.5khz bandwidth. when a precise reference voltage is available (e.g. from t l431a), the precision of the motor current regulation can be improved when compared to the internal voltage reference. hint u sing a low reference voltage (e.g. below 1v), for adaptation of a high current driver to a low current motor will lead to reduced analog performance. a dapt ing the sense resistors to fit the desired motor current gives a better result . figure 9 . 1 scaling the motor current using the analog input d a c r e f e r e n c e a i n _ i r e f i r e f 8 b i t d a c d i g i t a l c u r r e n t c o n t r o l 2 . 5 v p r e c i s i o n r e f e r e n c e 0 - 2 . 4 v f o r c u r r e n t s c a l i n g d a c r e f e r e n c e a i n _ i r e f i r e f p w m o u t p u t o f c w i t h > 2 0 k h z 0 - 2 . 4 v f o r c u r r e n t s c a l i n g 2 2 k 1 p r e c i s i o n c u r r e n t s c a l e r s i m p l e p w m b a s e d c u r r e n t s c a l e r d a c r e f e r e n c e a i n _ i r e f i r e f 1 - 2 . 4 v f o r f i x e d c u r r e n t s c a l i n g r 1 f i x e d r e s i s t o r d i v i d e r t o s e t c u r r e n t s c a l e ( u s e e x t e r n a l r e f e r e n c e f o r e n h a n c e d p r e c i s i o n ) r 2 5 v o u t o r p r e c i s e r e f e r e n c e v o l t a g e r 1 + r 2 ? 1 0 k r 3 1 0 0 k o p t i o n a l d i g i t a l c o n t r o l b c 8 4 7
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 67 www.trinamic.com 10 selecting se nse resistors set t he desired maximum motor current by selecting an appropriate value for the sense resistor. the following table shows the rms current values which can be reached using standard resistors and motor types fitting without additional motor cu rrent scaling. c hoice of r sense and resulting max . motor current r sense [?] rms current [a] (cs=31, vsense=0) rms current [a] (cs=31, vsense=1) 1.00 0.23 0.12 0.82 0.27 0.15 0.75 0.30 0.17 0.68 0.33 0.18 0.50 0.44 0.24 0.47 0.47 0.26 0.33 0.66 0.36 0.27 0.79 0.44 0.22 0.96 0.53 0.15 1.35 0.75 0.12 1.64 0.91 0.10 1 .92*) 1.06 *) value exceeds upper current rating. sense resistors should be carefully selected. the full motor current flows through the sense resistors. due to chopper operation the sense resistors see pulsed current from the mosfet bridges. therefore, a low - inductance type such as film or composition resistors is required to prevent voltage spikes causing ringing on the sense voltage inputs leading to unstable measurement results. a lso, a low - inductance, low - resistance pcb layout is essential. any commo n gnd path for the two sense resistors must be avoided, because this would lead to coupling between the two current sense signals. a massive ground plane is best. please also refer to layout considerations in chapter 31 . the s ense resistor voltage range can be selected by the vsense bit in chopconf . the low sensitivity setting (high sense resistor voltage, vsense =0) brings best and most robust current regulation, while high sensitivity (low sense resistor voltage, vsense =1) red uces power dissipation in the sense resistor. the high sensitivity setting reduces the power dissipation in the sense resistor by nearly half. the current to both coils is scaled by the 5 - bit current scale parameters ( ihold , irun ). choose the sense resist or value so that the maximum desired current (or slightly more) flows at the maximum current setting ( irun = %11111). c alculation of rms current ? ??? = ?? + 1 32 ? ? ?? ? ????? + 20 ? ? ? 1 2 the momentary motor current is calculated by: ? ??? = ??? ? / ? 248 ? ?? + 1 32 ? ? ?? ? ????? + 20 ? ? cs is the current scale setting as set by the ihold and irun a nd coolstep. v fs is the full scale voltage as determined by vsense control bit (please refer to electrical characteristics, v srtl and v srth ). cur a/b is the actual value from the internal sine wave table. 248 is the amplitude of the internal sine wave tabl e.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 68 www.trinamic.com when i_scale_analog is enabled for analog scaling of v fs , the resulting voltage v fs is calculated by: ? ?? = ? ?? ? ? ??? 2 . 5 ? with v ain the voltage on pin ain_iref in the range 0v to v 5vout /2 the sense resistor needs to be able to conduct the peak motor coil current in motor standstill conditions, unless standby power is reduced. under n ormal conditions, the sense resistor conducts less than the coil rms current, because no current flows through the sense resistor during the slow decay phases. c alculation of peak s ense resistor power dissipation ? ????? = ? ???? 2 ? ? ?? ??? hint for best precision of current setting, it is advised to measure and fine tune the current in the application. attention be sure to use a symmetrical sense resistor layout and short and straight sense resistor traces of identical length . w ell matching sense resistors ensure best performance. a compact layout with massive ground plane is best to avoid parasitic resistance effects. parameter description setting comment irun current scale when motor is running. scales coil current values as t aken from the internal sine wave table. for high precision motor operation, work with a current scaling factor in the range 16 to 31, because scaling down the current values reduces the effective microstep resolution by making microsteps coarser. this sett ing also controls the maximum current value set by coolstep. 0 31 1/32, 2/32, 32/32 ihold identical to irun , but for motor in stand still. ihold delay allows smooth current reduction from run current to hold current. iholddelay con trols the number of clock cycles for motor power down after t zerowait in increments of 2^18 clocks: 0=instant power down, 1..15: current reduction delay per current step in multiple of 2^18 clocks. example: when using irun =31 and ihold =16, 15 current step s are required for hold current reduction. a iholddelay setting of 4 thus results in a power down time of 4*15*2^18 clock cycles, i.e. roughly one second at 16mhz. 0 instant ihold 1 15 18 15*2 18 clocks per current decrement vsense allows cont rol of the sense resistor voltage range for full scale current. 0 v fs = 0.32 v 1 v fs = 0.18 v
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 69 www.trinamic.com 11 internal s ense r esistors the tmc 5130a provides the option to eliminate external sense resistors. in this mode the external sense resistors become omitted (shorted) and the internal on - resistance of the power mosfets is used for curr ent measurement (see figure 3 . 3 ) . as mosfets are both, temperature dependent and subject to production stray, a tiny external resistor connected from +5vout to ain/iref is used to provide a precise absolute current reference . this resistor converts the 5v voltage into a reference current . be sure to directly attach bra and brb pins to gnd in this mode near the ic package. the mode is enabled by setting internal_rsense in gconf . c omparing i nternal s ense r esistors vs . s ense r esistor s item internal sense resistors external sense resistors ease of use set internal_rsense first (+) default cost (+) save cost for sense resistors current precision slightly reduced (+) good current range recommended 200ma rms to 1.2a rms 50ma to 1.4a rms recommended chopper stealthchop, spreadcycle shows slightly reduced performance at >1a stealthchop or spreadcycle while the rdson based measurements bring benefits concerning cost and size of the driver, it gives slightly less precise coil current regulation when compared to external sense resistors. the internal sense resistors have a certain temperature dependence, which is automatically compensated by the driver ic. however, for high current motors, a temperature gradient between the ics interna l sense resistors and the compensation circuit will lead to an initial current overshoot of some 10% during driver ic heat up. while this phenomenon shows for roughly a second, it might even be beneficial to enable increased torque during initial motor acc eleration. p rinciple of o peration a reference current into the ain/iref pin is used as reference for the motor current. in order to realize a certain current, a single resistor (r ref ) can be connected between 5vout and ain/iref (pls. refer the table for the choice of the resistor). ain/iref input resistance is about 1kohm. the resulting current into ain/iref is amplified 3000 times. thus, a current of 0.5ma yields a motor current of 1.5a peak. for calculation of the reference resistor, the internal resist ance of vref needs to be considered additionally. when using reference currents above 0.5ma resulting in higher theoretical current settings of up to 2a, the resulting current decreases linearly when chip temperature exceeds a certain maximum temperature . for a 2a setting it decreases from 2a at up to 100c down to about 1.5a at 150c. the resulting curve limits the maximum current setting in this mode. for calculation of the reference resistor, the internal resistance of ain/rref needs to be considered a dditionally. vsense =1 allows a lower peak current setting of about 55% of the value yielded with vsense =0 (as specified by v srt h / v srt l ). for fine tuning use the current scale cs .
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 70 www.trinamic.com c hoice of r ref for o per a tion without s ense r esistors r ref [?] peak curr ent [a] ( cs=31 , vsense= 0 ) peak current [a] ( cs=31 , vsense= 1 ) 6k8 1. 92 1. 06 7k5 1. 76 0. 97 8k2 1. 63 0. 90 9k1 1. 49 0. 82 10k 1. 36 0. 75 12k 1. 15 0. 63 15k 0. 94 0. 52 18k 0. 79 0. 43 22k 0. 65 0. 36 27k 0. 60 0. 33 33k 0. 54 0. 29 in rdson measurement mode, c onnect the bra and brb pins to gnd using the shortest possible path (i.e. lowest possible pcb resistance) . in a realistic setup, the effective current will be slightly lower than expected . rdson based measurement gives best results when combined with class ic constant off time chopper or with the voltage pwm stealthchop. when using spreadcycle with rdson based current measurement , slightly asymmetric current measurement for positive currents (on phase) and negative currents (fast decay phase) can result in c hopper noise. this especially occurs at increased die temperature and increased motor current . note the absolute current levels achieved with rdson based current sensing may depend on pcb layout exactly like with external sense resistors , because trace re sistance on br pins will add to the effective sense resist ance. therefore we recommend to measure and calibrate the current setting within the application. thumb rule rdson based current sensing works best for motors with up to 1.2a rms current. the best results are yielded with stealthchop operation in combination with rdson based current sensing. consider using classic chopper rather than spreadcycle. for most precise current control and best results with spreadcycle , it is recommended to use external 1% sense resistors rather than rdson based current control.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 71 www.trinamic.com 12 velocity based mode control the tmc 5130a allows the configuration of different chopper modes and modes of operation for optimum motor control . depending on the motor load, the different modes can be optimized for low est noise & high precision, highest dynamics , or maximum torque at highest velocity. some of the features like coolstep or stallguard 2 are useful in a limited velocity range. a number of velocity thresholds allow combin ing the differen t modes of operation within an application requiring a wide velocity range. figure 12 . 1 choice of velocity dependent modes figure 12 . 1 shows all availa ble thresholds and the required ordering. vpwmthrs, vhigh and vcoolthrs are determined by the settings tpwmthrs , thigh and tcoolthrs . the velocity is described by the time interval tstep between each two step pulses. this allows determination of the veloci ty when an external step source is used. tstep always becomes normalized to 256 microstepping. this way, the thresholds do not have to be adapted when the microstep resolution is changed. the thresholds represent the same motor velocity, independent of the microstep settings. tstep becomes compared to these threshold values. a hysteresis of 1/16 tstep resp. 1/32 tstep is applied to avoid continuous toggling of the comparison results when a jitter in the tstep measurement occurs. the upper switching velocity is higher by 1/16, resp. 1/32 of the value set as threshold. the stealthchop threshold tpwmthrs is not shown. it can be included with vpwmthrs < vcoolthrs. the motor current can be programmed to a run and a hold level, dependent on the standstill flag sts t . using automatic velocity thresholds allows tuning the application for different velocity ranges. features like coolstep will integrate completely transparently in your setup. this way, once parameterized, they do not require any activation or deactiva tion via software. o p t i o n o p t i o n o p t i o n o p t i o n o p t i o n o p t i o n o p t i o n m i c r o s t e p m i c r o s t e p h i g h v e l o c i t y f u l l s t e p m i c r o s t e p + c o o l s t e p m i c r o s t e p + c o o l s t e p m i c r o s t e p p i n g m i c r o s t e p p i n g m o t o r s t a n d s t i l l m o t o r g o i n g t o s t a n d b y m o t o r i n s t a n d b y m o t o r i n s t a n d b y v t v p w m t h r s + v p w m t h r s 0 v c o o l t h r s + v h i g h + v a c t u a l ~ 1 / t s t e p v c o o l t h r s v h i g h c u r r e n t t p o w e r d o w n r m s c u r r e n t i _ h o l d i _ r u n d i * i h o l d d e l a y c o o l s t e p c u r r e n t r e d u c t i o n s t e a l t h c h o p s p r e a d c y c l e c o n s t . t o f f c h o p p e r m o d e t r i n a m i c , b . d w e r s t e g , 1 4 . 3 . 1 4
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 72 www.trinamic.com parameter description setting comment stst this flag indicates motor stand still in each operation mode. this occurs 2^20 clocks after the last step pulse. 0/1 status bit, read only t power down this is the delay time after stand still ( stst ) of the motor to motor current power down. time range is about 0 to 4 seconds. 0 255 time in multiples of 2^18 t clk tstep actual measured time between two 1/256 microsteps derived from the step input frequency in units of 1/fclk. measured value is (2^20) - 1 in case of overflow or stand still. 0 t clk tpwmthrs tstep tpwmthrs - stealthchop pwm mode is enabled, if configured - dcstep is disabled 0 tcoolthrs tcoolthrs tstep thigh : - coolstep is enabled, if configured - stealthchop voltage pwm mode is disabled tcoolthrs tstep - stop on stall and stall output signal is enabled, if configured 0 t high tstep t high : - coolstep is disabled (motor runs with normal current scale) - stealthchop voltage pwm mode is disabled - if vhighchm is set, the chopper s witches to chm =1 with tfd =0 (constant off time with slow decay, only). - chopsync2 is switched off ( sync =0) - if vhighfs is set, the motor operates in fullstep mode and the stall detection becomes switched over to dcstep stall detection . 0 small_ hysteresis hysteresis for step frequency comparison based on tstep (lower velocity threshold) and ( t step *15/16) - 1 respectively ( t step *31/32) - 1 (upper velocity threshold) 0 hysteresis is 1/16 1 hysteresis is 1/32 vhighfs this bit enables switching to fullstep, when vhigh is exceeded. switching takes place only at 45 position. the fullstep target current uses the current value from t he microstep table at the 45 position. 0 no switch to fullstep 1 fullstep at high velocities vhighchm this bit enables switching to chm =1 and fd =0, when vhigh is exceeded. this way, a higher velocity can be achieved. can be combined with vhighfs =1. if set, the toff setting automatically becomes doubled during high velocity operation in order to avoid doubling of the chopper frequency. 0 no change of chopper mode 1 classic const. toff chopper at high velocities en_pwm_ mode stealthchop voltage pwm enable flag (depending on velocity thresholds). switch from off to on state while in stand still, only. 0 no stealthchop 1 stealthchop below vpwmthrs
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 73 www.trinamic.com 13 driver diagnostic flags the tmc 5130a drivers supply a complete set of diagnostic and protection cap abilities, like short to gnd protection and undervoltage detection. a detection of an open load condition allows testing if a motor coil connection is interrupted. see the drv_status table for details. 13.1 temperature measurement the driver integrates a two l evel temperature sensor (120c pre - warning and 150c thermal shutdown) for diagnostics and for protection of the ic against excess heat. h eat is mainly generated by the motor driver stages , and, at increased voltage, by the internal voltage regulator. most critical situations, where the driver mosfets could be overheated, are avoided when enabling the short to gnd protection. for many applications, the overtemperature pre - warning will indicate an abnormal operation situation and can be used to initiate user warning or power reduction measures like motor current reduction. the thermal shutdown is just an emergency measure and temperature rising to the shutdown level should be prevented by design. after triggering the over temperature sensor ( ot flag), the d river remains switched off until the system temperature falls below the pre - warning level ( otpw ) to avoid continuous heating to the shutdown level. 13.2 short to gnd protection the tmc 5130a power stages are protected against a short circuit condition by an add itional measure - ment of the current flowing through the high - side mosfets. this is important, as most short circuit conditions result from a motor cable insulation defect, e.g. when touching the conducting parts connected to the system ground. the short de tection is protected against spurious triggering, e.g. by esd discharges, by retrying three times before switching off the motor. once a short condition is safely detected, the corresponding driver bridge becomes switched off, and the s2ga or s2gb flag b ecomes set. in order to restart the motor, the user must intervene by disabling and re - enabling the driver. it should be noted, that the short to gnd protection cannot protect the system and the power stages for all possible short events, as a short event is rather undefined and a complex network of external components may be involved. therefore, short circuits should basically be avoided. 13.3 open load diagnostics interrupted cables are a common cause for systems failing, e.g. when connectors are not firmly pl ugged. the tmc 5130a detects open load conditions by checking, if it can reach the desired motor coil current. this way, also undervoltage conditions, high motor velocity settings or short and overtemperature conditions may cause triggering of the open load flag, and inform the user, that motor torque may suffer. in motor stand still, open load cannot be measured, as the coils might eventually have zero current. in order to safely detect an interrupted coil connection, read out the open load flags at low o r nominal motor velocity operation, only. however, the ola and olb flags have just informative character and do not cause any action of the driver.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 74 www.trinamic.com 14 ramp generator the ramp generator allows motion based on target position or target velocity. it automatica lly calculates the optimum motion profile taking into account acceleration and velocity settings. the tmc 5130a integrates a new type of ramp generator, which offers faster machine operation compared to the classical linear acceleration ramps. the sixpoint ramp generator allows adapting the acceleration ramps to the torque curves of a stepper motor and uses two different acceleration settings each for the acceleration phase and for the deceleration phase. see figure 14 . 2 . 14.1 real world unit conversion the tmc 5130a uses its internal or external clock signal as a time reference for all internal operations. thus, all time, velocity and acceleration settings are referenced to f clk . for best stability and reproducibility, it is recommended to use an external quartz oscillator as a time base, or to provide a clock signal from a microcontroller. the units of a tmc 5130a register content are written as register[ 5130a ]. p arameter vs . u nits parameter / symbol unit calculation / description / comment f clk [hz] [hz] clock frequency of the tmc 5130a in [hz] s [s] second us step fs fullstep step velocity v[hz] steps / s v[hz] = v[ 5130a ] * ( f clk [hz]/2 / 2^23 ) step acceleration a[hz/s] steps / s^2 a[hz/s] = a[ 5130a ] * f clk [hz]^2 / (512*256) / 2^24 usc microstep count counts microstep resolution in number of microsteps (i.e. the number of microsteps between two fullsteps C tstep, tthrs clk / f step the time reference for velocity thresholds is referred to the actual microstep frequency of the clock input respectively velocity v[hz]. in rare cases, the upper acceleration limit might impose a limitation to the application, e.g. when working with a reduced clock frequency or high gearing and low load on the motor . in order to increase the effective acceleration possible , the microstep resolution of the sequencer input may be decreased . s etting the chopconf options intpol =1 and mres =%0001 will double the motor velocity for the same speed setting and thus also double effective acceleration and deceleration. the motor will have the same smoothness, but half position resolution with this setting . quick start for a quick start, see the quick configuration guide in chapter 24 .
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 75 www.trinamic.com 14.2 motion profiles for the ramp generator register set, please refer to the chapter 6.3 . 14.2.1 ramp mode the ramp generator delivers two phase acceleration and two phase deceleration ramps with additional programmable start and stop velocities (see figure 14 . 1 ). the two different sets of acceleration and deceleration can be combined freely. a common trans ition speed v1 allows for velocity dependent switching between both acceleration and deceleration settings . a typical use case will use lower acceleration and deceleration values at higher velocities, as the motors torque declines at higher velocity. when considering friction in the system, it becomes clear, that typically deceleration of the system is quicker than acceleration. thus, deceleration values can be higher in many applications. this way, operation speed of the motor in time critical applications can be maximized. as target positions and ramp parameters may be changed any time during the motion, the motion controller will always use the optimum (fastest) way to reach the target, while sticking to the constraints set by the user. this way it might happen, that the motion becomes automatically stopped, crosses zero and drives back again. this case is flagged by the special flag second_move. 14.2.2 start and stop velocity when using increased levels of start - and stop velocity, it becomes clear, that a sub sequent move into the opposite direction would provide a jerk identical to vstart + vstop , rather than only vstart . as the motor probably is not able to follow this, you can set a time delay for a subsequent move by setting tzero wait . an active delay time is flagged by the flag t_zerowait_active . once the target position is reached, the flag pos ition _reached becomes active. figure 14 . 1 ramp generator velocity trace showing consequen t move in negative direction note the start velocity can be set to zero, if n ot used. t he stop v elocity can be set to ten (or down to one), if not used. take care to always set vstop identical to or above vstart . this ensures that even a s hort motion can be terminated successfully at the target position. v t a c c e l e r a t i o n p h a s e d e c e l e r a t i o n p h a s e m o t o r s t o p v s t o p v s t a r t 0 v 1 v m a x a m a x d m a x d 1 a 1 - a 1 t z e r o w a i t a c c e l e r a t i o n p h a s e v a c t u a l
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 76 www.trinamic.com figure 14 . 2 illustration of optimized motor torque usage with tmc 5130a ramp generator 14.2.3 velocity mode for the ease of use, velocity mode movements do not use the different acceleration and deceleration settings. you need to set vmax and amax only for velocity mode. the ramp generator always uses amax to accelerate or decelerate to vmax in this mode. in order to decelerate the motor to stand still, it i s sufficient to set vmax to zero. the flag vzero signals standstill of the motor. the flag velocity_reached always signals, that the target velocity has been reached. 14.2.4 early ramp termination in cases where user s can interact with a system, some applicatio ns require terminating a motion by ramping down to zero velocity before the target position has been reached. o ptions to t erminate m otion using a cceleration s ettings : a) s witch to velocity mode, set vmax =0 and amax to the desired deceleration value. this w ill stop the motor using a linear ramp. b) for a stop in positioning mode, set vstart =0 and vmax =0. vstop is not used in this case. the driver will use amax and a1 (as determined by v1 ) for going to zero velocity. c) for a stop using d1 , dmax and vstop , trigge r the deceleration phase by copying xactual to xtarget . set tzerowait sufficiently to allow the cpu to interact during this time . the driver will decelerate and eventually come to a stop. poll the actual velocity to terminate motion during tzerowait time u sing option a) or b) . d) a ctivate a stop switch. this can b e done by means of the hardware input, e.g. using a wired 'or' to the stop switch input. if you do not use the hardware input and have tied the refl a nd refr to a fixed level, enable the stop function ( stop_l_enable , stop_r_enable ) and use the inverting function ( pol_stop_l , pol_stop_r ) to simulat e the switch activation . t o r q u e f o r v s t a r t t o r q u e a v a i l a b l e f o r a m a x t o r q u e a v a i l a b l e f o r a c c e l e r a t i o n a 1 t o r q u e r e q u i r e d f o r s t a t i c l o a d s t o r q u e v e l o c i t y [ r p m ] 0 m f r i c t m m a x v m a x m f r i c t p o r t i o n o f t o r q u e r e q u i r e d f o r f r i c t i o n a n d s t a t i c l o a d w i t h i n t h e s y s t e m m m a x m o t o r p u l l - o u t t o r q u e a t v = 0 m o t o r t o r q u e m n o m 2 h i g h a c c e l e r a t i o n r e d u c e d a c c e l . v 1 m n o m 1 m n o m 1 / 2 t o r q u e a v a i l a b l e a t v 1 r e s p . v m a x m o t o r t o r q u e u s e d i n a c c e l e r a t i o n p h a s e h i g h d e c e l e r a t i o n r e d u c e d d e c e l . 2 x m f r i c t o v e r a l l t o r q u e u s a b l e f o r d e c e l e r a t i o n v s t a r t
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 77 www.trinamic.com 14.2.5 application example: joystick control applications like surveillance cameras can be optimally enhanced using the motion controller: while joystick commands operate the motor at a user defined velocity, the target ramp generator ensures that the valid motion range never is left. r ealize j oystick c ontrol 1. use positioning mode in order to control the motion direction and to set the motio n limit(s). 2. modify vmax at any time in the range vstart to your maximum value. with vstart =0, you can also stop motion by setting vmax =0. the motion controller will use a1 and amax as determined by v1 to adapt velocity for ramping up and ramping down. 3. in case you do not modify the acceleration settings, you do not need to rewrite xtarget , just modify vmax . 4. dmax , d1 and vstop only become used when the ramp controller slows down due to reaching the target position, or when the target position has been modif ied to point to the other direction. 14.3 velocity thresholds the ramp generator provides a number of velocity thresholds coupled with the actual velocity vactual . the different ranges allow programming the motor to the optimum step mode, coil current and accel eration settings. most applications will not require all of the thresholds, but in principle all modes can be combined as shown in figure 14 . 1 . vhigh and vcoolthrs are determined by the settings thigh and tcoolthrs in order to all ow determination of the velocity when an external step source is used. tstep becomes compared to these threshold values. a hysteresis of 1/16 tstep resp. 1/32 tstep is applied to avoid continuous toggling of the comparison results when a jitter in the tste p measurement occurs. the upper switching velocity is higher by 1/16, resp. 1/32 of the value set as threshold. the stealthchop threshold tpwmthrs is not shown . it can be include d with vpwmthrs < vcoolthrs. figure 14 . 3 ramp generator velocity dependent motor control the velocity thresholds for the different chopper modes and sensorless operation features are coupled to the time between each two microsteps tstep . h i g h v e l o c i t y f u l l s t e p m i c r o s t e p + c o o l s t e p m i c r o s t e p + c o o l s t e p m i c r o s t e p p i n g m i c r o s t e p p i n g m o t o r s t a n d s t i l l m o t o r g o i n g t o s t a n d b y m o t o r i n s t a n d b y m o t o r i n s t a n d b y v t v s t o p v s t a r t 0 v 1 v m a x a m a x d m a x d 1 a 1 v a c t u a l v c o o l t h r s v h i g h c u r r e n t t z e r o w a i t r m s c u r r e n t i _ h o l d i _ r u n d i * i h o l d d e l a y c o o l s t e p c u r r e n t r e d u c t i o n
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 78 www.trinamic.com 14.4 reference switches prior to normal operation of the drive an absolute reference position must be set. the reference position can be found using a mechanical stop which can be detected by stall detection, or by a reference switch. in case of a linear drive, the mechanical m otion range must not be left. this can be ensured also for abnormal situations by enabling the stop switch functions for the left and the right reference switch. therefore, the ramp generator responds to a number of stop events as configured in the sw_mode register. there are two ways to stop the motor: - i t can be stopped abruptly, when a switch is hit. this is useful in an emergency case and for stallguard based homing. - or the motor can be softly decelerated to zero using deceleration settings (dmax, v1, d1 ) . hint latching of the ramp position xactual to the holding register xlatch upon a switch event gives a precise snapshot of the position of the reference switch. figure 14 . 4 u sing reference switches (example) normally open or normally closed switches can be used by programming the switch polarity or selecting the pullup or pull - down resistor configuration. a normally closed switch is failsafe with respect to an interrupt of the switch connection. switches which can be used are: - mechanical switches, - photo interrupters, or - hall sensors. be careful to select reference switch resistors matching your switch requirements! in case of long cables additional rc filtering might be re quired near the tmc 5130a reference inputs. adding an rc filter will also reduce the danger of destroying the logic level inputs by wiring faults, but it will add a certain delay which should be considered with respect to the application. i mplementing a h oming p rocedure 1. make sure, that the home switch is not pressed , e.g. by moving away from the switch . 2. activate position latching upon the desired switch event and activate motor (soft) stop upon active switch. stallguard based homing requires using a hard stop ( en_softstop =0) . 3. start a motion ramp into the direction of the switch. (move to a more negative position for a left switch, to a more positive position for a right switch). you may timeout this motion by using a position ramping command. + v c c _ i o r e f l t r a v e l e r m o t o r + v c c _ i o r e f r n e g a t i v e d i r e c t i o n p o s i t i v e d i r e c t i o n 1 0 k 1 0 k 2 2 k 1 n f o p t i o n a l r c f i l t e r ( e x a m p l e )
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 79 www.trinamic.com 4. as soon as th e switch is hit, the position becomes latched and the motor is stopped. wait until t he motor is in standstill again by polling the actual velocity v actual or checking vzero or the standstill flag. please be aware that reading ramp_stat may clear flags (e.g . sg_stop ) and thus the motor may restart after expiration of tzerowait . in case the stop condition might be reset by the read and clear (r+c) function, be sure to execute step 5 within the time range set by tzerowait . 5. switch the ramp generator to hold mod e and calculate the difference between the latched position and the actual position. for stallguard based homing or when using hard stop , xactual stops exactly at the home position, so there is no difference (0). 6. write the calculated difference into the ac tual position register. now, homing is finished. a move to position 0 will bring back the motor exactly to the switching point. in case stallguard was used for homing, a read access to ramp_stat clears the stallguard stop event event_stop_sg and releases t he motor from the stop condition. h oming with a t hird s witch some applications use an additional home switch, which operates independently of the mechanical limit switches. the encoder functionality of the tmc5130 provides an additional source for positi on latching. it allows using the n channel input to snapshot xactual with a rising or falling edge event, or both. this function also provides an interrupt output. 1. activate the latching function ( encmode : set ignoreab , clr_cont , neg_edge or pos_edge and l atch_x_act ). the latching function can then trigger the interrupt output (check by reading n_event in enc_status when interrupt is signaled at diag0). 2. m ove to the direction, where the n channel switch should be. i n case the motor hit s a stop switch (refl o r refr) before the home switch is detected , reverse the motion direction . 3. r ead out x latch once the switch has been triggered . it gives the position of the switch event. 4. after detection of the switch event, s top the motor, and subtract xlatch from the actua l position . (a detailed description of the required steps is in the homing procedure above . ) 14.5 external step/dir d river the tmc 5130a allows using the internal ramp generator to control an external step/dir driver like the trinamic tmc262, tmc2660 or tmc389 for powerful stepper applications. in this configuration, the internal driver will normally not be used, but it may be used in addition to the external driver, e.g. when two motors shall move synchronously . the swn_diag0 and swp_diag1 outputs are enabled f or step and dir output by setting gconf flags diag0_step and diag1_dir . additional internal driver features like dcstep and automatic motor current control are not available in this mode , because there is no feedback from the external driver to the tmc5130 a . in order to provide a robust and simple interface, the step output uses the edge triggered mode, i.e. it toggles with each (micro)step taken. enable the dedge function on the external driver. the feature also can be used to provide a step - synchronous signal to external logic.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 80 www.trinamic.com 15 stallguard2 load measurement stallguard2 provides an accurate measurement of the load on the motor. it can be used for stall detection as well as other uses at loads below those which stall the motor, such as coolstep load - adap tive current reduction. the stallguard2 measurement value changes linearly over a wide range of load, velocity, and current settings, as shown in figure 15 . 1 . at maximum motor load, the value goes to zero or near to zero. this cor responds to a load angle of 90 between the magnetic field of the coils and magnets in the rotor. this also is the most energy - efficient point of operation for the motor. figure 15 . 1 function principle of stallguard2 parameter description setting comment sgt this signed value controls the stallguard2 threshold level for stall detection and sets the optimum measurement range for readout. a lower value gives a higher sensitivity. ze ro is the starting value working with most motors. a higher value makes stallguard2 less sensitive and requires more torque to indicate a stall. 0 indifferent value +1 +63 less sensitivity - 1 - 64 higher sensitivity sfilt enables the stallguard2 fi lter for more precision of the measurement. if set, reduces the measurement frequency to one measurement per electrical period of the motor (4 fullsteps). 0 standard mode 1 filtered mode status word description range comment sg this is the stallguard2 result . a higher reading indicates less mechanical load. a lower reading indicates a higher load and thus a higher load angle. tune the sgt setting to show a sg reading of roughly 0 to 100 at maximum load before motor stall. 0 1023 0: highest load low va lue: high load high value: less load attention in order to use stallguard2 and coolstep, the stallguard2 sensitivity should first be tuned using the sgt setting! m o t o r l o a d ( % m a x . t o r q u e ) s t a l l g u a r d 2 r e a d i n g 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 1 0 0 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 1 0 0 s t a r t v a l u e d e p e n d s o n m o t o r a n d o p e r a t i n g c o n d i t i o n s m o t o r s t a l l s a b o v e t h i s p o i n t . l o a d a n g l e e x c e e d s 9 0 a n d a v a i l a b l e t o r q u e s i n k s . s t a l l g u a r d v a l u e r e a c h e s z e r o a n d i n d i c a t e s d a n g e r o f s t a l l . t h i s p o i n t i s s e t b y s t a l l g u a r d t h r e s h o l d v a l u e s g t .
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 81 www.trinamic.com 15.1 tuning stallguard2 threshold sgt t he stallguard2 value sg is affected by motor - specific c haracteristics and application - specific demands on load and velocity . therefore the easiest way to tune the stallguard2 threshold sgt for a specific motor type and operating conditions is interactive tuning in the actual application. i nitial proc edure for tuning stall g uard sgt 1. operate the motor at the normal operation velocity for your application and monitor sg . 2. apply slowly increasing mechanical load to the motor. if the motor stalls before sg reaches zero, decrease sgt . if sg reaches zero before the mot or stalls, increase sgt . a good sgt starting value is zero. sgt is signed, so it can have negative or positive values. 3. now enable sg_stop and make sure, that the motor is safely stopped whenever it is stalled. increase sgt if the motor becomes stopped befo re a stall occurs. restart the motor by disabling sg_stop or by reading the ramp_stat register (read and clear function). 4. the optimum setting is reached when sg is between 0 and roughly 100 at increasing load shortly before the motor stalls, and sg increas es by 100 or more without load. sgt in most cases can be tuned for a certain motion velocity or a velocity range . make sure, that the setting works reliable in a certain range (e.g. 80% to 120% of desired velocity) and also under extreme motor conditions ( lowest and highest applicable temperature). o ptional procedure a llowing automatic tu ning of sgt the basic idea behind the sgt setting is a factor, which compensates the stallguard measurement for resistive losses inside the motor. at standstill and very lo w velocities, resistive losses are the main factor for the balance of energy in the motor, because mechanical power is zero or near to zero. this way, sgt can be set to an optimum at near zero velocity. this algorithm is especially useful for tuning sgt wi thin the application to give the best result independent of environment conditions, motor stray, etc. 1. operate the motor at low velocity < 10 rpm (i.e. a few to a few fullsteps per second) and target operation current and supply voltage. in this velocity range, there is not much dependence of sg on the motor load, because the motor does not generate significant back emf. therefore, mechanical load will not make a big difference on the result. 2. switch on sfilt . now increase sgt starting from 0 to a value, w here sg starts rising . with a high sgt , sg will rise up to the maximum value . reduce again to the highest value, where sg stays at 0. now the sgt value is set as sensibly as possible. when you see sg increasing at higher velocities, there will be useful st all detection. the upper velocity for the stall detection with this setting is determined by the velocity, where the motor back emf approaches the supply voltage and the motor current starts dropping when further increasing velocity. sg goes to zero whe n the motor stalls and the ramp generator can be programmed to stop the motor upon a stall event by enabling sg_stop in sw_mode . set tcoolstep to match the lower velocity threshold where stallguard delivers a good result in order to use sg_stop . the syst em clock frequency affects sg . an external crystal - stabilized clock should be used for applications that demand the highest performance. the power supply voltage also affects sg , so tighter regulation results in more accurate values. sg measurement has a h igh resolution, and there are a few ways to enhance its accuracy, as described in the following sections. quick start for a quick start, see the quick configuration guide in chapter 24 . for detail procedure see application not e an002 - parameterization of stallguard2 & coolstep
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 82 www.trinamic.com 15.1.1 variable velocity limits tcoolthrs and thigh the sgt setting chosen as a result of the previously described sgt tuning can be used for a certain velocity range. outside this range, a stall may not be de tected safely, and coolstep might not give the optimum result. figure 15 . 2 example: o ptimum sgt setting and stallguard2 reading with an example motor in many applications, opera tion at or near a single operation point is used most of the time and a single setting is sufficient. the driver provides a lower and an upper velocity threshold to match this. the stall detection is d isabled outside the determined operation point, e.g. du ring acceleration phases preceding a sensorless homing procedure when setting tcoolthrs to a matching value. an upper limit can be specified by thigh . in some applications, a velocity dependent tuning of the sgt value can be expedient, using a small numbe r of support points and linear interpolation. 15.1.2 small motors with high torque ripple and resonance motors with a high detent torque show an increased variation of the stallguard2 measurement value sg with varying motor currents, especially at low currents. for these motors, the current dependency should be checked for best result. 15.1.3 temperature dependence of motor coil resistance motors working over a wide temperature range may require temperature correction, because motor coil resistance increases with ris ing temperature. this can be corrected as a linear reduction of sg at increasing temperature, as motor efficiency is reduced. 15.1.4 accuracy and reproducibility of stallguard2 measurement in a production environment, it may be desirable to use a fixed sgt value within an application for one motor type. most of the unit - to - unit variation in stallguard2 measurements results from manu - facturing tolerances in motor construction. the measurement error of stallguard2 C provided that all other parameters remain stable C can be as low as: ?????????? ??????????? ????? = ??? ( 1 , | ??? | ) b a c k e m f r e a c h e s s u p p l y v o l t a g e o p t i m u m s g t s e t t i n g m o t o r r p m ( 2 0 0 f s m o t o r ) s t a l l g u a r d 2 r e a d i n g a t n o l o a d 2 4 6 8 1 0 1 2 1 4 1 6 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 1 0 0 0 1 8 2 0 0 0 5 0 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 4 0 0 4 5 0 5 0 0 5 5 0 6 0 0 l o w e r l i m i t f o r s t a l l d e t e c t i o n g o o d o p e r a t i o n r a n g e w i t h s i n g l e s g t s e t t i n g
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 83 www.trinamic.com 15.2 stallguard2 update rate and filter the stallguard2 measurement value sg is updated with each full step of the motor. this is enough to safely detect a stall, because a stall always means the loss of four full steps. in a practical application, especially when using coolstep, a more precise measurement might be more important than an update for each fullstep because the mechanical load never changes instantaneously from one step to t he next. for these applications, the sfilt bit enables a filtering funct ion over four load measurements. the filter should always be enabled when high - precision measurement is required. it compensates for variations in motor construction, for example due t o misalignment of the phase a to phase b magnets. the filter should be disabled when rapid response to increasing load is required and for best results of sensorless homing using stallguard . 15.3 detecting a motor stall for best stall detection, work without st allguard filtering ( sfilt =0). to safely detect a motor stall the stall threshold must be determined using a specific sgt setting. therefore, the maximum load needs to be determined, which the motor can drive without stalling . at the same time, monitor the sg value at this load, e.g. some value within the range 0 to 100. the stall threshold should be a value safely within the operating limits, to allow for parameter stray. the response at an sgt setting at or near 0 gives some idea on the quality of the sign al: check the sg value without load and with maximum load. they should show a difference of at least 100 or a few 100, which shall be large compared to the offset. if you set the sgt value in a way, that a reading of 0 occurs at maximum motor load, the sta ll can be automatically detected by the motion controller to issue a motor stop. in the moment of the step resulting in a step loss, the lowest reading will be visible. after the step loss, the motor will vibrate and show a higher sg reading. 15.4 homing with s tallguard the homing of a linear drive requires moving the motor into the direction of a hard stop. as stallguard needs a certain velocity to work (as set by tcoolthrs ), make sure that the start point is far enough away from the hard stop to provide the di stance required for the acceleration phase . after setting up sgt and the ramp generator register s, start a motion into the direction of the hard stop and activate the stop on stall function ( set sg_stop in sw_mode ). once a stall is detected , the ramp gener ator stop s motion and set s v actual zero, stopping the motor . the stop condition also is indicated by the flag stallguard in drv_status . after setting up new motion parameters in order to prevent the motor from restarting right away, stallguard can be disab led, or the motor can be re - enabled by reading ramp_stat . the read and clear function of the event_stop_sg flag in ramp_stat would restart the motor after expiration of t zerowait in case the motion parameters have not been modified. 15.5 limits of stallguard2 o peration stallguard2 does not operate reliably at extreme motor velocities: very low motor velocities (for many motors, less than one revolution per second) generate a low back emf and make the measurement unstable and dependent on environment conditions ( temperature, etc.). the automatic tuning procedure described above will compensate for this. other conditions will also lead to extreme settings of sgt and poor response of the measurement value sg to the motor load. very high motor velocities, in which t he full sinusoidal current is not driven into the motor coils also leads to poor response. these velocities are typically characterized by the motor back emf reaching the supply voltage.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 84 www.trinamic.com 16 coolstep operation coolstep is an automatic smart energy optimizatio n for stepper motors based on the motor mechanical load, making them green. 16.1 user benefits coolstep allows substantial energy savings, especially for motors which see varying loads or operate at a high duty cycle. because a stepper motor application needs to work with a torque reserve of 30% to 50%, even a constant - load application allows significant energy savings because coolstep automatically enables torque reserve when required. reducing power consumption keeps the system cooler, increases motor life, and allows reducing cost in the power supply and coo ling components. reducing motor current by half results in reducing power by a factor of four. 16.2 setting up for coolstep coolstep is controlled by several parameters, but two are critical for understanding how it works: parameter description range comment semin 4 - bit unsigned integer that sets a lower threshold . if sg goes below this threshold, coolstep increases the current to both coils. the 4 - bit semin value is scaled by 32 to cover the lower half of the range of the 10 - bit sg value. (the name of this parameter is derived from smartenergy, which is an earlier name for coolstep.) 0 disable coolstep 115 semin *32 semax 4 - bit unsigned integer that controls an upper threshold . if sg is sampled equal to or above this threshold enough times, coolstep decreases the current to both coils. the upper threshold is ( semin + semax + 1)*32. 015 semin + semax +1)*32 figure 16 . 1 shows the operating regions of coolstep: - the black line represents t he sg measurement value. - the blue line represents the mechanical load applied to the motor. - the red line represents the current into the motor coils. when the load increases, sg falls below semin , and coolstep increases the current. when the load decre ases, sg rises above ( semin + semax + 1) * 32, and the current is reduced. energy efficiency C motor generates less heat C less cooling infrastructure C cheaper motor C
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 85 www.trinamic.com figure 16 . 1 coolstep adapts motor current to the load five more parameters control coolstep and one sta tus value is returned: parameter description range comment seup sets the current increment step . the current becomes incremented for each measured stallguard2 value below the lower threshold. 03 sedn sets the number of stallgu ard 2 readings above the upper threshold necessary for each current decrement of the motor current. 03 seimin sets the lower motor current limit for coolstep operation by scaling the irun curre nt setting. 0 0: 1/2 of irun 1 1: 1/4 of irun t cool thrs lower velocity threshold for switching on coolstep and stop on stall . below this velocity coolstep becomes disabled (not used in step/dir mode). adapt to the lower limit of the velocity range w here stallguard2 gives a stable result. hint: may be adapted to disable coolstep during acceleration and deceleration phase by setting identical to vmax . 1 tstep t high upper v elocity threshold value for coolstep and stop on stall . above this velocity coolstep becomes disabled. adapt to the velocity range where stallguard2 gives a stable result. 1 status word description range comment csactual this status value provides the actual motor current scale as controlled by coolstep. the value goes up to the irun value and down to the portion of irun as specified by seimin . 031 1/32, 2/32, 32/32 s t a l l g u a r d 2 r e a d i n g 0 = m a x i m u m l o a d m o t o r c u r r e n t i n c r e m e n t a r e a m o t o r c u r r e n t r e d u c t i o n a r e a s t a l l p o s s i b l e s e m i n s e m a x + s e m i n + 1 z e i t m o t o r c u r r e n t c u r r e n t s e t t i n g i _ r u n ( u p p e r l i m i t ) ? o r ? i _ r u n ( l o w e r l i m i t ) m e c h a n i c a l l o a d c u r r e n t i n c r e m e n t d u e t o i n c r e a s e d l o a d s l o w c u r r e n t r e d u c t i o n d u e t o r e d u c e d m o t o r l o a d l o a d a n g l e o p t i m i z e d l o a d a n g l e o p t i m i z e d l o a d a n g l e o p t i m i z e d
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 86 www.trinamic.com 16.3 tuning c oolstep before tuning coolstep, first tune the stallguard2 threshold level sgt , which affects the range of the load measurement value sg . coolstep uses sg to operate the motor near the optimum load angle of +90. the current increment speed is specified i n seup , and the current decrement speed is specified in sedn . they can be tuned separately because they are triggered by different events that may need different responses. the encodings for these parameters allow the coil currents to be increased much mor e quickly than decreased, because crossing the lower threshold is a more serious event that may require a faster response. if the response is too slow, the motor may stall. in contrast, a slow response to crossing the upper threshold does not risk anything more serious than missing an opportunity to save power. coolstep operates between limits controlled by the current scale parameter irun and the seimin bit. 16.3.1 response time for fast response to increasing motor load, use a high current increment step seup . if the motor load changes slowly, a lower current increment step can be used to avoid motor oscillations. if the filter controlled by sfilt is enabled, the measurement rate and regulation speed are cut by a factor of four. hint the most common and most b eneficial use is to adapt coolstep for operation at the typical system target operation velocity and to set the velocity thresholds according. as acceleration and decelerations normally shall be quick, they will require the full motor current, while they h ave only a small contribution to overall power consumption due to their short duration. 16.3.2 low velocity and s tandby o peration because coolstep is not able to measure the motor load in standstill and at very low rpm, a lower velocity threshold is provided in the ramp generator. it should be set to an application specific default value. below this threshold the normal current setting via irun respectively ihold is valid. an upper threshold is provided by the vhigh setting. both thresholds can be set as a result of the stallguard2 tuning process.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 87 www.trinamic.com 17 s tep /d ir interface the step and dir inputs provide a simple, standard interface compatible with many existing motion controllers. the microplyer step pulse interpolator brings the smooth motor operation of high - resolut ion microstepping to applications originally designed for coarser stepping. in case an external step source is used, the complete integrated motion controller can be switched off for one or both motors at any time. the only motion controller registers rema ining active in this case are the current settings in register ihold_irun . 17.1 timing f igure 17 . 1 shows the timing parameters for the step and dir signals, and the table below gives their specifications. when the dedge mode bit in th e drvctrl register is set, both edges of step are active. if dedge is cleared, only rising edges are active. step and dir are sampled and synchronized to the system clock. an internal analog filter removes glitches on the signals, such as those caused by l ong pcb traces. if the signal source is far from the chip, and especially if the signals are carried on cables, the signals should be filtered or differentially transmitted. f igure 17 . 1 step and dir timing , input pin filter step and dir interface timing ac - characteristics clock period is t clk parameter symbol conditions min typ max unit step frequency (at maximum microstep resolution) f step dedge =0 ? f clk dedge =1 ? f c lk fullstep frequency f fs f clk /512 step input low time *) t sl max(t filtsd , t clk +20) ns step input high time *) t sh max(t filtsd , t clk +20) ns dir to step setup time t dsu 20 ns dir after step hold time t dsh 20 ns step and dir spike filt ering time *) t filtsd rising and falling edge 36 60 85 ns step and dir sampling relative to rising clk input t sdclkhi before rising edge of clk input t filtsd ns *) these values are valid with full input logic level swing, only. asymmetric logic levels will increase filtering delay t filtsd , due to an internal input rc filter. + v c c _ i o s c h m i t t t r i g g e r 0 . 4 4 v c c _ i o 0 . 5 6 v c c _ i o 2 5 0 k 0 . 2 6 p f i n p u t f i l t e r r * c = 6 5 n s + - 3 0 % s t e p o r d i r i n p u t i n t e r n a l s i g n a l d i r s t e p t d s h t s h t s l t d s u a c t i v e e d g e ( d e d g e = 0 ) a c t i v e e d g e ( d e d g e = 0 )
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 88 www.trinamic.com 17.2 changing resolution a reduced microstep resolution allows limitation of the step frequency for the step/dir interface, or compatibility to an older, less performing driver. the i nternal microstep table with 1024 sine wave entries generates sinusoidal motor coil currents . these 1024 entries correspond to one electrical revolution or four fullsteps. the microstep resolution setting determines the step width taken within the table. d epending on the dir input, the microstep counter is increased (dir=0) or decreased (dir=1) with each step pulse by the step width. the microstep resolution determines the increment respectively the decrement. at maximum resolution, the sequencer advances o ne step for each step pulse. at half r esolution, it advances two steps. increment is up to 256 steps for fullstepping . the sequencer has special provision to allow seamless switching between different microstep rates at any time . when switching to a lower microstep resolution , it calculates the nearest step within the target resolution and reads the current vector at that position. this behavior especially is important for low resolutions like fullstep and halfstep, because any failure in the step sequence would lead to asymmetrical run when comparing a motor running clockwise and counterclockwise. e xamples : fullstep : cycles through table position s: 128 , 384, 640 and 896 (45 , 135, 225 and 315 electrical position, both coils on at identical current). th e coil current in each position corresponds to the rms - value ( 0.7 1 * amplitude ) . step size is 256 (90 electrical) half step : the first table position is 64 (22.5 electrical), step size is 128 (45 steps) quarter step : the first table position is 32 (90/ 8=11.25 electrical), step size is 64 (22.5 steps) this way equidistant steps result and they are identical in both rotation directions. some older drivers also use zero current (table entry 0, 0) as well as full current (90) within the step tables. th is kind of stepping is avoided because it provides less torque and has a worse power dissipation in driver and motor. step position table position current coil a current coil b half step 0 64 38.3% 92.4% full step 0 128 70.7% 70.7% half step 1 192 92. 4% 38.3% half step 2 320 92.4% - 38.3% full step 1 384 70.7% - 70.7% half step 3 448 38.3% - 92.4% half step 4 576 - 38.3% - 92.4% full step 2 640 - 70.7% - 70.7% half step 5 704 - 92.4% - 38.3% half step 6 832 - 92.4% 38.3% full step 3 896 - 70.7% 70.7% hal f step 7 960 - 38.3% 92.4%
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 89 www.trinamic.com 17.3 microplyer step interpolator and stand still detection for each active edge on step, microplyer produces microsteps at 256x resolution, as shown in f igure 17 . 2 . it interpolates the time in between of two step impulses at the step input based on the last step interval. this way, from 2 microsteps (128 microstep to 256 microstep interpolation) up to 256 microsteps (full step input to 256 microsteps) are driven for a single step pulse. enable microplyer by setting the intpol bit in the chopconf register. operation is only recommended in s tep /d ir mode. the step rate for the interpolated 2 to 256 microsteps is determined by measuring the time interval of the previous step period and dividing it into up t o 256 equal parts. the maximum time between two microsteps corresponds to 2 20 (roughly one million system clock cycles), for an even distribution of 256 microsteps. at 16 mhz system clock frequency, this results in a minimum step input frequency of 16 hz f or microplyer operation. a lower step rate causes the stst bit to be set, which indicates a standstill event. at that frequency, microsteps occur at a rate of (system clock frequency)/2 16 ~ 256 hz. when a stand still is detected, the driver automatically s witches the motor to holding current ihold . attention microplyer only works perfectly with a stable step frequency. do not use the dedge option i f the step signal does not have a 50% duty cycle. f igure 17 . 2 microplyer microstep interpolation with rising step frequency (example: 16 to 256) in f igure 17 . 2 , the first step cycle is long enough to set the standstill bit stst . this bit is clear ed on the next step active edge. then, the external step frequency increases . a fter one cycle at the higher rate microplyer adapts the interpolated microstep rate to the higher frequency . during the last cycle at the slower rate, microplyer did not generat e all 16 microsteps, so there is a small jump in motor angle between the first and second cycles at the higher rate. s t e p i n t e r p o l a t e d m i c r o s t e p a c t i v e e d g e ( d e d g e = 0 ) a c t i v e e d g e ( d e d g e = 0 ) a c t i v e e d g e ( d e d g e = 0 ) 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 3 2 a c t i v e e d g e ( d e d g e = 0 ) s t a n d s t i l l ( s t s t ) a c t i v e 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 m o t o r a n g l e 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 6 5 6 6 5 1 2 ^ 2 0 t c l k
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 90 www.trinamic.com 18 diag o utputs 18.1 step/dir m ode operation with an external motion controller often requires quick reaction to certain states of the stepper m otor driver. therefore, the diag outputs supply a configurable set of different real time information complementing the step/dir interface. both, the information available at diag0 and diag1 can be selected as well as the type of output (low active open d rain C default setting , or high active push - pull). in order to determine a reset of the driver, diag0 always shows a power - on reset condition by pulling low during a reset condition. figure 18 . 1 shows the available signals and con trol bits. figure 18 . 1 d iag outputs in step/dir mode the stall output signal allows stallguard2 to be hand led by the external motion cont r o ller like a stop switch. the index outp ut signals the microstep counter zero position, to allow the application to reference the drive to a certain current pattern. chopper on - state shows the on - state of both coil choppers (alternating) when working in spreadcycle or constant off time in order to determine the duty cycle. the dcstep skipped information is an alternative way to find out when dcstep runs with a velocity below the step velocity. it toggles with each step not taken by the sequencer. attention the duration of the index pulse corres ponds to the duration of the microstep . when working without interpolation at less than 256 microsteps, the index time goes down to two clk clock cycles. 18.2 motion controller mode in motion controller mode, the diag outputs deliver a position compare signal to allow exact triggering of external logic, and an interrupt signal in order to trigger software to certain conditions within the motion ramp. either an open drain (active low) output signal can be chosen (default), or an active high push - pull output sign al. when using the open drain output, an external pull up resistor in the range 4.7k? to 33k? is required. diag0 also becomes driven low upon a reset c ondition. however d i a g 1 d i a g 0 p m d p d d p d d = 1 0 0 k p u l l d o w n p m d = 5 0 k t o v c c / 2 p o w e r - o n r e s e t d r i v e r e r r o r d i a g 0 _ e r r o r o v e r t e m p . p r e w a r n i n g d i a g 0 _ o t p w s t a l l d i a g 0 _ s t a l l d i a g 0 _ p u s h p u l l s e q u e n c e r m i c r o s t e p 0 i n d e x d i a g 1 _ i n d e x c h o p p e r o n - s t a t e d i a g 1 _ o n s t a t e d i a g 1 _ s t e p s _ s k i p p e d d i a g 1 _ p u s h p u l l d i a g 1 _ s t a l l d c s t e p s t e p s s k i p p e d
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 91 www.trinamic.com the end of the reset condition cannot be determined by monitoring diag0 in this configu ration, because even t _pos_reached flag also becomes active upon reset and thus the pin stays actively low after the reset condition . in order to safely determine a reset condition, monitor the reset flag by spi or read out any register to confirm that the chip is powered up . figure 18 . 2 diag outputs with sd_mode=0 d i a g 1 d i a g 0 p m d p d d p d d = 1 0 0 k p u l l d o w n p m d = 5 0 k t o v c c / 2 p o w e r - o n r e s e t t o g g l e u p o n e a c h s t e p d i a g 0 _ s t e p d i a g 0 _ p u s h p u l l d i a g 1 _ p u s h p u l l e v e n t _ p o s _ r e a c h e d e v e n t _ s t o p _ s g e v e n t _ s t o p _ r e v e n t _ s t o p _ l n _ e v e n t d i r e c t i o n d i a g 1 _ d i r p o s i t i o n c o m p a r e x a c t u a l = x _ c o m p a r e i n t e r r u p t - s i g n a l
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 92 www.trinamic.com 19 dcstep dcstep is an automatic commutation mode for the stepper motor. it allows the stepper to run with its target velocity as commanded by the ramp generator as long as it can cope with the load. in case the motor becomes overloaded, it slows down to a velocity, where the motor can still drive the load. this way, the stepper motor never stalls and can drive heavy loa ds as fast as possible. its higher torque available at lower velocity, plus dynamic torque from its flywheel mass allow compensating for mechanical torque peaks. in case the motor becomes completely blocked, the stall flag becomes set. 19.1 user benefits 19.2 designing - in dcstep in a classical application, the operation area is limited by the maximum torque required at maximum application velocity. a safety margin of up to 50% torque is required, in order to compensate for unforeseen load peaks, torque loss due to resonance and aging of mechanical components. dcstep allo ws using up to the full available motor torque. even higher short time dynamic loads can be overcome using motor and application flywheel mass without the danger of a motor stall. with dcstep the nominal application load can be extended to a higher torque only limited by the safety margin near the holding torque area (which is the highest torque the motor can provide). additionally, maximum application velocity can be increased up to the actually reachable motor velocity. f igur e 19 . 1 dcstep extended application operation area quick start for a quick start, see the quick configuration guide in chapter 24 . for detail configuration procedure see applicati on note an00 3 - dcstep motor C never loses steps application C works as fast as possible acceleration C automatically as high as possible energy efficiency C highest at speed limit cheaper motor C does the job! c l a s s i c o p e r a t i o n a r e a w i t h s a f e t y m a r g i n t o r q u e v e l o c i t y [ r p m ] d c s t e p o p e r a t i o n - n o s t e p l o s s c a n o c c u r a d d i t i o n a l f l y w h e e l m a s s t o r q u e r e s e r v e m i c r o s t e p o p e r a t i o n 0 m n o m 1 m m a x v d c m i n v m a x m n o m : n o m i n a l t o r q u e r e q u i r e d b y a p p l i c a t i o n m m a x : m o t o r p u l l - o u t t o r q u e a t v = 0 a p p l i c a t i o n a r e a m a x . m o t o r t o r q u e s a f e t y m a r g i n d c s t e p e x t e n d e d s a f e t y m a r g i n : c l a s s i c a l a p p l i c a t i o n o p e r a t i o n a r e a i s l i m i t e d b y a c e r t a i n p e r c e n t a g e o f m o t o r p u l l - o u t t o r q u e m n o m 2
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 93 www.trinamic.com 19.3 dcstep integration with the motion controller dcstep requires only a few settings. it directly feeds back motor motion to the ramp generator, so that it becomes seamlessly integrated into the motion ramp, even if the motor becomes overloaded with respect to the target velocity. dcstep operates the motor in fullstep mode at the ramp generator target velocity vactual or at reduced velocity if the motor becomes overloaded. it requires settin g the minimum operation velocity vdcmin . vdcm in shall be set to the lowest operating velocity where dcstep gives a reliable detection of motor operation. the motor never stalls unless it becomes braked to a velocity below vdcmin . in case the velocity should fall below this value, the motor would rest art once its load is released, unless the stall detection becomes enabled (set sg_stop ). stall detection is covered by stallguard2 . f igure 19 . 2 velocity profile with impact by ov erload situation attention dcstep requires that the phase polarity of the sine wave is positive within the mscnt range 768 to 255 and negative within 256 to 767. the cosine polarity must be positive from 0 to 511 and negative from 512 to 1023. a phase shi ft by 1 would disturb dcstep operation. therefore it is advised to work with the default wave. please refer chapter 20.2 for an initialization with the default table. 19.4 stall d etection in dcstep m ode while dcstep is able to decel erate the motor upon overload, it cannot avoid a stall in every operation situation. once the motor is blocked, or it becomes decelerated below a motor dependent minimum velocity where the motor operation cannot safely be detected any more, the motor may s tall and loose steps. in order to safely detect a step loss and avoid restarting of the motor, the stop on stall can be enabled (set flag sg_stop ). in this case vactual becomes set to zero once the motor is stalled. it remains stopped until reading the ram p_stat status flag s. the flag event_stop_sg shows the active stop condition. a stallguard2 load value also is available during dcstep operation . the range of values is limited to 0 to 255, in certain situations up to 511 will be read out . in order to enabl e stallguard, also set tcoolthrs corresponding to a velocity slightly above vdcmin or up to vmax . stall detection in this mode may trigger falsely due to resonances, when flywheel loads are loosely coupled to the motor axis. v t d c s t e p a c t i v e v d c m i n 0 v 1 v m a x a m a x d m a x d 1 a 1 n o m i n a l r a m p p r o f i l e r a m p p r o f i l e w i t h t o r q u e o v e r l o a d a n d s a m e t a r g e t p o s i t i o n o v e r l o a d
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 94 www.trinamic.com parameter description range co mment vhighfs & vhighchm these chopper configuration flags in chopconf need to be set for dcstep operation. as soon as vdcmin becomes exceeded, the chopper becomes switched to fullstepping. 0 / 1 set to 1 for dcstep toff dcstep often benefits from an inc reased off time value in chopconf . settings >2 should be preferred. 2 settings 815 do not make vdcmin this is the lower threshold for dcstep operation when using internal ramp generator . below this th reshold, the motor operates in normal microstep mode. in dcstep operation, the motor operates at minimum vdcmin , even when it is completely blocked. tune together with dc_time setting. activation of stealthchop also disables dcstep. 0 2^22 dc_time this setting controls the reference pulse width for dcstep load measurement . it must be optimized for robust operation with maximum motor torque. a higher value allows higher torque and hig her velocity, a lower value allows operation down to a lower velocity as set by vdcmin . check best setting under nominal operation conditions, and re - check under extreme operating conditions (e.g. lowest operation supply voltage, highest motor temperature , and highest supply voltage, lowest motor temperature). 0 t blank (as defined by tbl ) in clock cycles + n with n in the range 1 to 10 0 (for a typical motor) dc_sg this setting controls stall detection in dcstep mode. increase for higher sensitivity. a stall can be used as an error condition by issuing a hard stop for the motor. enable sg_stop flag for stopping the motor upon a stall event . this way the motor will be stopped once it stalls. 0 dc_time / 16 19.5 measuring actual motor velocity in dcstep operation dcstep has the ability to reduce motor velocity in case the motor becomes slower than the target velocity due to mechanical load. vactual shows the ramp generator target velocity. it is not influenced by dcstep. measuring dcstep velocity is possible based on the position counter xactual . therefore take two snapshots of the position counter with a known time difference: ??????? ?????? = ??????? ( ???? 2 ) ? ??????? ( ???? 1 ) ???? 2 ? ???? 1 ? 2 24 ? ??? example: at 16.0 mhz clock frequency, a 0.954 second measurement delay would directly yield in the velocity value, a 9.54 ms delay would yield in 1/100 of the actual dcstep velocity. to grasp the time interval as precisely as possible, snapshot a timer each time the transmission of xactual from the ic starts or ends. the rising edge of ncs for spi transmission provides the most exac t time reference.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 95 www.trinamic.com 19.6 dcstep with step/dir i nterface the tmc 5130a provides two ways to use dcstep when interfaced to an external motion controller . t he first way gives direct control of the dcstep step execution to the external motion controller , which must r eact to motor overload and is allow ed to override a blocked motor situation. the second way assumes that the external motion controller cannot directly react to dcstep signals. the tmc 5130a automatically reduces the motor velocity or stops the motor upon o verload . in order to allow the motion controller to react to the reduced real motor velocity in this mode, the counter lost_steps gives the number of steps which have been commanded, but not taken by the motor controller. the motion controller can later on read out lost_steps and drive any missing number of steps. in case of a blocked motor it tries moving it with the minimum velocity as programmed by vdcmin . enabling dcstep automatically sets the chopper to constant toff mode with slow decay only. this wa y, no re - configuration is required when switching from microstepping mode to dcstep and back. dcstep operation is controlled by three pins in step and dir mode: - dcen C forc es the driver to dcstep operation if high. a velocity based activation o f dcs tep is controlled by tpwmthrs when using stealthchop operation for low velocity settings. in this case, dcstep is disabled while in stealthchop mode, i.e. at velocities below the stealthchop switching velocity. - dco C informs the motion controller when mo tor is not ready to take a new step (low level). the motion controller shall react by delaying the next step until dco becomes high. the sequencer can buffer up to the effective number of microsteps per fullstep to allow the motion controller to react to a ssertion of dco. in case the motor is blocked this wait situation can be terminated after a timeout by providing a long > 1024 clock step input, or via the internal vdcmin setting. - d cin C c ommands the driver to wait with step execution and to disable dc o. this input can be u sed for synchronization of multiple drivers operating with dcstep . 19.6.1 using lost_steps for dcstep operation this is the simplest possibility to integrate dcstep with an external motion controller: the external motion controller enables dcstep using dcen or the internal velocity threshold . the tmc 5130a tr ie s to follow the steps . in case it needs to slow down the motor, it counts the difference between in coming steps on the step signal and steps going to the motor. the motion controller ca n read out the difference and compensate for the difference after the motion or on a cyclic basis. figure 19 . 3 shows the principle (simplified). in case the motor driver needs to postpone steps due to detection of a mechanical ov erload in dcstep, and the motion controller does not react to this by pausing the step generation, lost_steps becomes incremented or decremented (depending on the direction set by dir) with each step which is not taken. this way, the number of lost steps c an be read out and executed later on or be appended to the motion. as the driver needs to slow down the motor while the overload situation persists, the application will benefit from a high microstepping resolution, because it allows more seamless accelera tion or deceleration in dcstep operation. in case the application is completely blocked, vdcmin sets a lower limit to the step execution. if the motor velocity falls below this limit, however an unknown number of steps is lost and the motor position is not exactly known any more. dcin allows for step synchronization of two drivers: it stops the execution of steps if low and sets dco low.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 96 www.trinamic.com figure 19 . 3 motor moving slower than step i nput due to light overload. loststeps incremented 19.6.2 dco interface to motion controller in step/dir mode, dc en enables dcstep. it is up to the external motion controller to enable dcstep either , once a minimum step velocity is exceeded within the motion ramp , or to use the automatic threshold vdcmin for dcstep enable . the step/dir interface works in microstep resolution , even if the internal step execution is based on fullstep. this way, no switching to a different mode of operation is required within the m otion controller. the dcstep output dco signals if the motor is ready for the next step based on the dcstep measurement of the motor . if the motor has not yet mechanically taken the last step, this step cannot be executed, and the driver stops automaticall y before execution of the next fullstep . this situation is signaled by dco. the external motion controller shall stop step generation if dcout is low and wait until it becomes high again . figure 19 . 5 shows this principle . the driv er buffers steps during the waiting period up to the number of microstep setting minus one. in case, dcout does not go high within the lower step limit time e.g. due to a severe motor overload , a step can be enforced : o verride the stop status by a long ste p pulse with min. 1024 system clocks length . when using internal clock, a pulse length of minimum 125s is recommended . figure 19 . 4 full signal interconnection for dcstep + i m a x - i m a x 0 s t e p d c _ e n d c _ o u t d c o s i g n a l s t h a t t h e d r i v e r i s n o t r e a d y f o r n e w s t e p s . i n t h i s c a s e , t h e c o n t r o l l e r d o e s n o t r e a c t t o t h i s i n f o r m a t i o n . a c t u a l m o t o r v e l o c i t y 0 v d c m i n d c s t e p e n a b l e d c o n t i n u o s l y v t a r g e t p h a s e c u r r e n t ( o n e p h a s e s h o w n ) t h e o r e t i c a l s i n e w a v e c o r r e s p o n d i n g t o f u l l s t e p p a t t e r n s t e p s f r o m s t e p i n p u t s k i p p e d b y t h e d r i v e r d u e t o l i g h t m o t o r o v e r l o a d l o s t s t e p s 0 2 4 8 1 2 1 6 2 0 2 2 2 4 l o s t s t e p s w o u l d c o u n t d o w n i f m o t i o n d i r e c t i o n i s n e g a t i v e l i g h t m o t o r o v e r l o a d r e d u c e s e f f e c t i v e m o t o r v e l o c i t y c o r m o t i o n c o n t r o l l e r t m c 5 1 3 0 s t e p d c o d i r d c e n d c i n o p t i o n a l a x i s s y n c h r o n i z a t i o n
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 97 www.trinamic.com figure 19 . 5 dco interface to motion controller C step generator stops when dco is asserted + i m a x - i m a x 0 p h a s e c u r r e n t ( o n e p h a s e s h o w n ) s t e p d c e n d c o s t e p _ f i l t _ i n t e r n ? 2 i n t c o m ? 2 ? 2 ? 2 ? 2 ? 2 ? 2 d c _ o u t t i m e o u t ( i n c o n t r o l l e r ) l o n g p u l s e = o v e r r i d e m o t o r b l o c k s i t u a t i o n t i m o u t c o u n t e r i n c o n t r o l l e r t h e o r e t i c a l s i n e w a v e c o r r e s p o n d i n g t o f u l l s t e p p a t t e r n i n c r e a s i n g m e c h a n i c a l l o a d f o r c e s s l o w e r m o t i o n ? 2 = m r e s ( n u m b e r o f m i c r o s t e p s p e r f u l l s t e p )
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 98 www.trinamic.com 20 sine - wave look - up table the tmc 5130a driver provides a programmable look - up table for stori ng the microstep current wave. as a default, the table is pre - programmed with a sine wave, which is a good starting point for most stepper motors. reprogramming the table to a motor specific wave allows drastically improved microstepping especially with lo w - cost motors. 20.1 user benefits 20.2 microstep table in order to minimize required memory and the amount of d ata to be programmed, only a quarter of the wave becomes stored. the internal microstep table maps the microstep wave from 0 to 90 . it becomes symmetr ically extended t o 360 . when reading out the table the 10 - bit microstep counter mscnt addresses the ful ly extended wave table . the table is stored in an incremental fashion, using each one bit per entry. therefore only 256 bits ( ofs00 to ofs255 ) are required to store the quarter wave. these bits are mapped to eight 32 bit registers. each ofs bit controls th e addition of an inclination w x or w x +1 when advancing one step in the table . when wx is 0, a 1 bit in the table at the actual microstep position means add one when advancing to the next microstep. as the wave can have a high er inclination than 1, the ba se inclinations wx can be programmed to - 1, 0, 1, or 2 using up to four flexible programmable segments within the quarter wave. this way even a negative inclination can be realized. the four inclination segments are controlled by the position registers x1 to x3 . inclination segment 0 goes from microstep position 0 to x1 - 1 and its base inclination is controlled by w0 , segment 1 goes from x1 to x2 - 1 with its base inclination controlled by w1 , etc. when modifyi ng the wave, care must be taken to ensure a smoo th and symmetrical zero transition when the quarter wave becomes expanded to a full wave . the maximum resulting swing of the wave should be adjusted to a range of - 248 to 248 , in order to give the best possible resolution while leaving headroom for the hys teresis based chopper to add an offset. f igure 20 . 1 lut programming example microstepping C motor C torque C m s c n t y 2 5 6 2 5 6 2 4 8 - 2 4 8 5 1 2 7 6 8 0 0 x 1 x 3 x 2 w 0 : + 2 / + 3 w 1 : + 1 / + 2 w 2 : + 0 / + 1 w 3 : - 1 / + 0 l u t s t o r e s e n t r i e s 0 t o 2 5 5 2 5 5 s t a r t _ s i n s t a r t _ s i n 9 0
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 99 www.trinamic.com when the microstep sequencer advances within the table, it calculates the actual current values for the motor coils with each microstep and stores them to the registers cur_a and cur_b . however the incremental coding requires an absolute initialization, especially when the microstep table becomes modified. therefore cur_a and cur_b become initialized wh enever mscnt passes zero. two registers control the starting values of the tables: - as the starting value at zero is not necessarily 0 (it might be 1 or 2), it can be programmed into the starting point register start_sin . - in the same way, the start of the second wave for the second motor coil needs to be stored in start_sin90 . this register stores the resulting table entry for a phase shift of 90 for a 2 - phase motor. hint refer chapter 6.5 for the register set. the default ta ble is a good base for realizing an own table. the tmc 5130a - eval comes with a calculation tool for own waves. initialization e xample for the reset default microstep table: mslut[0] = % 101010101010101 01011010101010100 = 0xaaaab554 mslut[1] = % 0100101010010 10 10101010010101010 = 0x4a9554aa mslut[ 2 ] = % 00100100010010010010100100101001 = 0x24492929 mslut[ 3 ] = % 00010000000100000100001000100010 = 0x10104222 mslut[ 4 ] = % 1111101111111 1111111111111111111 = 0xfbffffff mslut[ 5 ] = % 10110101101110110111011101111101 = 0xb5bb 777d mslut[ 6 ] = % 01001001001010010101010101010110 = 0x49295556 mslut[ 7 ] = % 00000000010000000100001000100010 = 0x 00 404222 mslutsel = 0xffff8056: x1 = 128 , x2 =255 , x3 = 255 w3 =%01, w2 =%01, w1 =%01, w0 =%10 mslutstart = 0x00 f 70000 : start_sin_0 = 0, start_sin90 = 247 21 e mergency stop the driver provides a negative active enable pin enn to safely switch off all power mosfets. this allows putting the motor into freewheeling. further, it is a safe hardware function whenever an emergency stop not coupled to software is requir ed. some applications may require the driver to be put into a state with active holding current or with a passive braking mode. this is possible by programming the pin enca_dcin to act as a step disable function. set gconf flag stop_enable to activate this option. whenever enca_dcin becomes pulled high , the motor will stop abruptly and go to the power down state, as configured via ihold , ihold_delay and stealthchop standstill options. please be aware, that disabling the driver via enn will require three cloc k cycles to safely switch off the driver. in case the external clk fails, it is not safe to disable enn. in this case, the driver should be reset, i.e. by switching off vcc_io.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 100 www.trinamic.com 22 abn incremental encoder interface the tmc 5130a is equipped with an incremental encoder interface for abn encoders. the encoder inputs are multiplexed with other signals in order to keep the pin count of the device low. the basic selection of the peripheral configuration is set by the register gconf . the u se of the n channel is optio nal, as some applications might use a reference switch or stall detection rather than an encoder n channel for position referencing. the encoders give positions via digital incremental quadrature signals (usually named a and b) and a clear signal (usually named n for null or z for zero). n s ignal the n signal can be used to clear the position counter or to take a snapshot. to continuously monitor the n channel and trigger clearing of the encoder position or latching of the position, where the n channel ev ent has been detected, set the flag clr_cont . alternatively it is possible to react to the next encoder n channel event only, and automatically disable the clearing or latching of the encoder position after the first n signal event (flag clr_once ) . this mi ght be desired because the encoder gives this signal once for each revolution. some encoders require a validation of the n signal by a certain configuration of a and b polarity. this can be controlled by pol_a and pol_b flags in the encmode register. for example, when both pol_a and pol_b are set, an active n - event is only accepted during a high polarity of both, a and b channel. for clearing the encoder position enc_pos with the next active n event set clear_on_n = 1 and clr_ once = 1 or clr_ cont = 1. f igure 22 . 1 outline of abn signals of an incremental encoder t he e ncoder c onstant enc_const the encoder constant enc_const is added to or subtracted from the encoder counter on e ach polarity change of the quadrature signals ab of the incremental encoder. the encoder constant enc_const represents a signed fixed point number (16.16) to facilitate the generic adaption between motors and encoders. in decimal mode, the lower 16 bits re present a number between 0 and 9999. for stepper motors equipped with incremental encoders the fixed number representation allows very comfortable parameterization. additionally, mechanical gearing can easily be taken into account. negating the sign of enc _const allows inversion of the counting direction to match motor and encoder direction. example s : - encoder factor of 1 .0 : enc_const = 0x0001. 0x 0000 = factor.fraction - encoder factor of - 1 .0 : enc_const = 0xffff. 0x 0000. this is the twos complement of 0x0001 0000. it equals (2^16 - ( factor +1) ).(2^16 - fraction ) - decimal mode encoder factor 25.6: 00025.6000 = 0x0019.0x1770 = factor.decimals a b t p o s i t i o n - 4 - 3 - 2 - 1 0 5 6 4 3 2 1 7 n
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 101 www.trinamic.com - decimal mode encoder factor - 25.6: 0xffe6.4000 = 0xffe6.0x0fao. this equals (2^16 - (factor+1)).(10000 - decimals) t he e ncoder c ou nter x_enc the encoder counter x_enc holds the current encoder position ready for read out. different modes concerning handling of the signals a, b, and n take into account active low and active high signals found with different types of encoders. for more details please refer to the register mapping in section 6.4 . t he r egister enc_status the register enc_status holds the status concerning the event of an encoder clear upon an n channel signals. the register enc_latch stores t he actual encoder position on an n signal event. 22.1 encoder timing the encoder inputs use analog and digital filtering to ensure reliable operation even with increased cable length. the maximum continuous counting rate is limited by input filtering to 2/3 of f clk . encoder interface timing ac - characteristics clock period is t clk parameter symbol conditions min typ max unit e ncoder counting frequency f cnt <2/3 f clk f clk a/b/n input low time t abnl 3 t clk +20 ns a/b/n input high time t abnh 3 t clk +20 ns a/b/n spike filtering time t filtabn rising and falling edge 3 t clk 22.2 setting the encoder to match motor resolution encoder example settings for motor parameters: usc=256 steps, 200 fullstep motor factor = fsc*usc / encoder resolution e ncoder example setti ngs for a 200 fullstep motor with 256 microsteps encoder resolution r equired encoder factor c omment 200 256 360 142.2222 = 9320675.5555 / 2^16 = 1422222.2222 / 10 000 no exact match possible! 500 102.4 = 6710886.4 / 2^16 = 1024000 / 10000 e xact match with decimal setting 1000 51.2 e xact match with decimal setting 1024 50 4000 12.8 e xact match with decimal setting 4096 12.5 16384 3.125 example : the encode r constant register shall be programmed to 51.2 in decimal mode. therefore, set ??? _ ????? = 51 ? 2 16 + 0 . 2 ? 10000
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 102 www.trinamic.com 22.3 closing the loop depending on the application, an encoder can be used for different purpose s . medical applications often require an additional and independent monitoring to detect hard or soft failure. upon failure, t he machine can be stopped and restarted manually . less critical applications may use the encoder to detect failure, stop the motors upon step loss and restart automatically. a different use of the encoder allows increased positioning precision by positioni ng directly to encoder positions. the application can modify target positions based on the deviation, or even regularly update the actual position with the encoder position. to realize a directly encoder based commutation, trinamic offers the new motion co ntroller tmc4361.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 103 www.trinamic.com 23 dc m otor or solenoid the tmc 5130a can drive one or two dc motors using one coil output per dc motor. either a torque limited operation, or a voltage based velocity control with optional torque limit is possible. c onfiguration and c ontr ol set the flag direct_mode in the gconf register . in direct mode, t he coil current polarity and coil current , respectively the pwm duty cycle become controlled by register xtarget (0x2d). bits 8..0 control motor a and bits 24..16 control motor b pwm . addi tionally to th is setting , the current limit is scaled by ihold . the s tep /d ir inputs and the motion controller are not used in this mode. pwm d uty c ycle v elocity c ontrol in order to operate the motor at different velocities, use the stealthchop voltage pw m mode in the following configuration: en_pwm_mode = 1, pwm_autoscale = 0, pwm_ampl = 255, pwm_grad = 4 , ihold = 31 set toff > 0 to enable the driver. in this mode the driver behaves like a 4 - quadrant power supply . t he direct mode setting of pwm a and p wm b using xtarget controls motor voltage, and thus the motor v e locity . setting the corresponding pwm bits between - 25 5 and +255 (signed, twos complement numbers) will vary motor voltage from - 100% to 100%. with pwm_autoscale = 0, current sensing is not u sed and the sense resistors should be eliminated or 150m ? or less to avoid excessive voltage drop when the motor becomes heavily loaded up to 2.5a. especially f or higher current motors, m ake sure to slowly accelerate and decelerate the motor in order to avoid overcurrent or triggering driver overcurrent detecti on . to activate optional motor freewheeling, set ihold = 0 and freewheel = %01. a dditional t orque l imit in order to additional ly take advantage of the motor current limitation (and thus torque controlled operation) in stealthchop mode, use automatic curr ent scaling ( pwm_autoscale = 1). the actual current limit is given by ihold and scaled by the respective motor pwm amplitude , e.g. pwm = 128 yields in 50% motor velocity and 50% of the current limit set by ihold . in case two dc motors are driven in voltage pwm mode, note that t he automatic current regulation will work only for the motor which has the higher absolute pwm setting. the pwm of the second motor a lso will be scaled down in case the motor with higher pwm setting reaches its current limitation . p urely t orque l imited o peration for a purely torque limited operation of one or two motors, spread cycle chopper individually regulates motor current for both full bridge motor outputs. when using spreadcycle, t he upper motor velocity is limited by the supp ly voltage only (or as determined by the load on the motor). 23.1 solenoid o peration the same way, one or two solenoids (i.e. magnetic coil actuators ) can be operated using spreadcycle chopper . for solenoids, it is often desired to have an increased current for a short time after switching on, and reduce the current once the magnetic element has switched. this is automatically possible by taking advantage of the automatic current scaling ( irun , ihold , iholddelay and t powerdown ). the current scaling in direct_mod e is still active, but will not be triggered if no step impulse is supplied. therefore, a step impulse must be given to the step input whenever one of the coils shall be switched on. this will increase the current for both coils at the same time.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 104 www.trinamic.com 24 quick c onfiguration guide this guide is meant as a practical tool to come to a first configuration and do a minimum set of measurements and decisions for tuning the driver. it does not cover all advanced functionalities, but concentrates on the basic function set to make a motor run smoothly . once the motor runs, you may decide to explore additional features , e.g. freewheeling and further functionality in more detail. a current probe on one motor coil is a good aid to find the best settings, but it is not a must. c urrent s etting and f irst s teps with stealth c hop figure 24 . 1 current setting and first steps with stealthchop c u r r e n t s e t t i n g s e n s e r e s i s t o r s u s e d ? g c o n f s e t i n t e r n a l _ r s e n s e n a n a l o g s c a l i n g ? y g c o n f s e t i _ s c a l e _ a n a l o g y c h o p c o n f s e t v s e n s e f o r m a x . 1 8 0 m v a t s e n s e r e s i s t o r ( 0 r 1 5 : 1 . 1 a p e a k ) s e t i _ r u n a s d e s i r e d u p t o 3 1 , i _ h o l d 7 0 % o f i _ r u n o r l o w e r n l o w c u r r e n t r a n g e ? n y g c o n f s e t e n _ p w m _ m o d e s e t i _ h o l d _ d e l a y t o 1 t o 1 5 f o r s m o o t h s t a n d s t i l l c u r r e n t d e c a y s e t t p o w e r d o w n u p t o 2 5 5 f o r d e l a y e d s t a n d s t i l l c u r r e n t r e d u c t i o n c o n f i g u r e c h o p p e r t o t e s t c u r r e n t s e t t i n g s s t e a l t h c h o p c o n f i g u r a t i o n p w m c o n f s e t p w m _ a u t o s c a l e , s e t p w m _ g r a d = 1 , p w m _ a m p l = 2 5 5 p w m c o n f s e l e c t p w m _ f r e q w i t h r e g a r d t o f c l k f o r a b o u t 3 5 k h z p w m f r e q u e n c y m a k e s u r e t h a t n o s t e p p u l s e s a r e g e n e r a t e d c h e c k h a r d w a r e s e t u p a n d m o t o r r m s c u r r e n t c h o p c o n f e n a b l e c h o p p e r u s i n g b a s i c c o n f i g . : t o f f = 4 , t b l = 2 , h s t a r t = 4 , h e n d = 0 m o v e t h e m o t o r b y s l o w l y a c c e l e r a t i n g f r o m 0 t o v m a x o p e r a t i o n v e l o c i t y i s p e r f o r m a n c e g o o d u p t o v m a x ? s e l e c t a v e l o c i t y t h r e s h o l d f o r s w i t c h i n g t o s p r e a d c y c l e c h o p p e r a n d s e t t p w m t h r s n s c 2 y
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 105 www.trinamic.com t uning stealth c hop and spread c ycle figure 24 . 2 tuning stealthchop and spreadcycle s c 2 t r y m o t i o n w i t h d e s i r e d a c c e l e r a t i o n a n d d e c e l e r a t i o n ( n o t e x c e e d i n g t p w m t r h r s ) p w m c o n f i n c r e a s e p w m _ g r a d ( m a x . 1 5 ) c o i l c u r r e n t o v e r s h o o t u p o n d e c e l e r a t i o n ? y m o v e s l o w l y , t r y d i f f e r e n t v e l o c i t i e s n m o t o r c u r r e n t s t a b l e ? p w m c o n f c h a n g e p w m _ f r e q o r s l i g h t l y d r e c r e a s e p w m _ g r a d n t r y m o t i o n a l s o a b o v e t p w m t r h r s , i f u s e d y c o i l c u r r e n t o v e r s h o o t u p o n d e c e l e r a t i o n ? p w m c o n f d e c r e a s e p w m _ a m p l ( d o n o t g o b e l o w a b o u t 5 0 ) y o p t i m i z e s p r e a d c y c l e c o n f i g u r a t i o n i f t p w m t h r s u s e d n g o t o m o t o r s t a n d s t i l l a n d c h e c k m o t o r c u r r e n t s t a n d s t i l l c u r r e n t t o o h i g h ? n c h o p c o n f , p w m c o n f d e c r e a s e t b l o r p w m f r e q u e n c y a n d c h e c k i m p a c t o n m o t o r m o t i o n y g c o n f d i s a b l e e n _ p w m _ m o d e s p r e a d c y c l e c o n f i g u r a t i o n c h o p c o n f e n a b l e c h o p p e r u s i n g b a s i c c o n f i g . : t o f f = 5 , t b l = 2 , h s t a r t = 0 , h e n d = 0 m o v e t h e m o t o r b y s l o w l y a c c e l e r a t i n g f r o m 0 t o v m a x o p e r a t i o n v e l o c i t y m o n i t o r s i n e w a v e m o t o r c o i l c u r r e n t s w i t h c u r r e n t p r o b e a t l o w v e l o c i t y c h o p c o n f i n c r e a s e h e n d ( m a x . 1 5 ) c u r r e n t z e r o c r o s s i n g s m o o t h ? n m o v e m o t o r v e r y s l o w l y o r t r y a t s t a n d s t i l l c h o p c o n f s e t t o f f = 4 ( m i n . 4 ) , t r y l o w e r / h i g h e r t b l o r r e d u c e m o t o r c u r r e n t a u d i b l e c h o p p e r n o i s e ? y y m o v e m o t o r a t m e d i u m v e l o c i t y o r u p t o m a x . v e l o c i t y a u d i b l e c h o p p e r n o i s e ? c h o p c o n f d e c r e a s e h e n d a n d i n c r e a s e h s t a r t ( m a x . 7 ) y f i n i s h e d o r e n a b l e c o o l s t e p
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 106 www.trinamic.com m oving the m otor u sing the m otion c ontroller figure 24 . 3 moving the motor usin g the motion controller r a m p m o d e s e t v e l o c i t y _ p o s i t i v e s e t a m a x = 1 0 0 0 , s e t v m a x = 1 0 0 0 0 0 o r d i f f e r e n t v a l u e s m o t o r m o v e s , c h a n g e v m a x a s d e s i r e d m o v e m o t o r c o n f i g u r e r a m p p a r a m e t e r s r a m p m o d e s e t p o s i t i o n s t a r t v e l o c i t y s e t v s t a r t = 0 . h i g h e r v e l c o i t y f o r a b r u p t s t a r t ( l i m i t e d b y m o t o r ) . s t o p v e l o c i t y s e t v s t o p = 1 0 , b u t n o t b e l o w v s t a r t . h i g h e r v e l o c i t y f o r a b r u p t s t o p . c o n f i g u r e r a m p p a r a m e t e r s m o v e t o t a r g e t s e t x t a r g e t n e w o n - t h e - f l y t a r g e t ? y e v e n t _ p o s _ r e a c h e d a c t i v e ? n n y t a r g e t i s r e a c h e d c h a n g e o f a n y p a r a m e t e r d e s i r e d ? n s e t m o t i o n p a r a m e t e r a s d e s i r e d y s e t a c c e l e r a t i o n a 1 a s d e s i r e d b y a p p l i c a t i o n d e t e r m i n e v e l o c i t y , w h e r e m a x . m o t o r t o r q u e o r c u r r e n t s i n k s a p p r e c i a b l y , w r i t e t o v 1 a m a x : s e t l o w e r a c c e l e r a t i o n t h a n a 1 t o a l l o w m o t o r t o a c c e l e r a t e u p t o v m a x s e t d e s i r e d m a x i m u m v e l o c i t y t o v m a x d m a x : u s e s a m e v a l u e a s a m a x o r h i g h e r d 1 : u s e s a m e v a l u e a s a 1 o r h i g h e r s e t t z e r o w a i t t o a l l o w m o t o r t o r e c o v e r f r o m j u m p v s t o p t o 0 , b e f o r e g o i n g t o v s t a r t i s v s t o p r e l e v a n t ( > > 1 0 ) ? n y s e t t p o w e r d o w n t i m e n o t s m a l l e r t h a n t z e r o - w a i t t i m e . m i n . v a l u e i s t z e r o w a i t / 5 1 2 r e a d y t o m o v e t o t a r g e t
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 107 www.trinamic.com e nabling cool s tep ( o nly in c ombination with spre ad c ycle ) figure 24 . 4 enabling coolstep ( only in combination with spreadcycle) e n a b l e c o o l s t e p m o v e t h e m o t o r b y s l o w l y a c c e l e r a t i n g f r o m 0 t o v m a x o p e r a t i o n v e l o c i t y d o e s s g _ r e s u l t g o d o w n t o 0 w i t h l o a d ? m o n i t o r s g _ r e s u l t v a l u e d u r i n g m e d i u m v e l o c i t y a n d c h e c k r e s p o n s e w i t h m e c h a n i c a l l o a d i s c o i l c u r r e n t s i n e - s h a p e d a t v m a x ? d e c r e a s e v m a x n y i n c r e a s e s g t y c o o l c o n f e n a b l e c o o l s t e p b a s i c c o n f i g . : s e m i n = 1 , a l l o t h e r 0 n s e t t h i g h t o m a t c h t s t e p a t v m a x f o r u p p e r c o o l s t e p v e l o c i t y l i m i t s e t t c o o l t h r s s l i g h t l y a b o v e t s t e p a t t h e s e l e c t e d v e l o c i t y f o r l o w e r v e l o c i t y l i m i t m o n i t o r c s _ a c t u a l d u r i n g m o t i o n i n v e l o c i t y r a n g e a n d c h e c k r e s p o n s e w i t h m e c h a n i c a l l o a d d o e s c s _ a c t u a l r e a c h i r u n w i t h l o a d b e f o r e m o t o r s t a l l ? i n c r e a s e s e m i n o r c h o o s e n a r r o w e r v e l o c i t y l i m i t s n c 2 c 2 m o n i t o r c s _ a c t u a l a n d m o t o r t o r q u e d u r i n g r a p i d m e c h a n i c a l l o a d i n c r e m e n t w i t h i n a p p l i c a t i o n l i m i t s d o e s c s _ a c t u a l r e a c h i r u n w i t h l o a d b e f o r e m o t o r s t a l l ? i n c r e a s e s e u p n f i n i s h e d
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 108 www.trinamic.com s etting up dc s tep figure 24 . 5 setting up dcstep e n a b l e d c s t e p d o e s t h e m o t o r r e a c h v m a x a n d h a v e g o o d t o r q u e ? s t a r t t h e m o t o r a t t h e t a r g e t e d v e l o c i t y v m a x a n d t r y t o a p p l y l o a d i n c r e a s e d c _ t i m e n y c h o p c o n f m a k e s u r e , t h a t t o f f i s n o t l e s s t h a n 3 . u s e l o w e s t g o o d t b l . s e t v h i g h f s a n d v h i g h c h m s e t t c o o l t h r s t o m a t c h t s t e p a t a v e l o c i t y s l i g h t l y a b o v e v d c m i n f o r l o w e r s t a l l g u a r d v e l o c i t y l i m i t s e t v d c m i n t o a b o u t 5 % t o 2 0 % o f t h e d e s i r e d o p e r a t i o n v e l o c i t y d c c t r l s e t d c _ t i m e d e p e n d i n g o n t b l : % 0 0 : 1 7 ; % 0 1 : 2 5 % 1 0 : 3 7 ; % 1 1 : 5 5 d o e s t h e m o t o r r e a c h v d c m i n w i t h o u t s t e p l o s s ? r e s t a r t t h e m o t o r a n d t r y t o s l o w i t d o w n t o v d c m i n b y a p p l y i n g l o a d d e c r e a s e d c _ t i m e o r i n c r e a s e t o f f o r i n c r e a s e v d c m i n n y d c c t r l s e t d c _ s g t o 1 + 1 / 1 6 t h e v a l u e o f d c _ t i m e s w _ m o d e e n a b l e s g _ s t o p t o s t o p t h e m o t o r u p o n s t a l l d e t e c t i o n f i n i s h e d o r c o n f i g u r e d c s t e p s t a l l d e t e c t i o n c o n f i g u r e d c s t e p s t a l l d e t e c t i o n d o e s t h e m o t o r s t o p u p o n t h e f i r s t s t a l l ? s l o w d o w n t h e m o t o r t o v d c m i n b y a p p l y i n g l o a d . f u r t h e r i n c r e a s e l o a d t o s t a l l t h e m o t o r . i n c r e a s e d c _ s g n y r e a d o u t r a m p _ s t a t t o c l e a r e v e n t _ s t o p _ s g a n d r e s t a r t t h e m o t o r a c c e l e r a t e t h e m o t o r f r o m 0 t o v m a x d o e s t h e m o t o r s t o p d u r i n g a c c e l e r a t i o n ? d e c r e a s e t c o o l t h r s t o r a i s e t h e l o w e r v e l o c i t y f o r s t a l l g u a r d y n f i n i s h e d
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 109 www.trinamic.com 25 getting started please refer to the tmc 5130a evaluation board to allow a quick start with the device, and in order to allow interactive tuning of the de vice setup in your application. chapter 24 will guide you through the process of correctly setting up all registers. 25.1 initialization examples spi datagram example sequence to enable the driver for step and direction operation a nd initialize the chopper for spreadcycle operation and for stealthchop at <60 rpm : spi send: 0x ec00010 0c 3 ; // chopconf: toff= 3 , hstrt=4, hend= 1 , tbl=2, chm=0 (spreadcycle) spi send: 0x 9 0000 6 1f0 a ; // ihold_irun : ihold= 10 , irun=31 (max. current) , iholdd elay=6 spi send: 0x 910 000000 a ; // t powerdown = 10 : delay before power down in stand still spi send: 0x8000000004 ; // en_pwm_mode=1 enables stealthchop ( with default pwm_conf) spi send: 0x 93000001f4; // tpwm_thrs=500 yields a switching velocity about 35000 = ca. 30rpm spi send: 0xf0000401c8 ; // pwm_conf: auto=1, 2 /1024 fclk, switch amplitude limit=200, grad=1 s pi s ample sequence to enabl e and initializ e the motion controller and move one rotation (51200 microsteps) using the ramp generator . a read access quer ying the actual position is also shown. spi send: 0xa4000003e8; // a1 = 1 000 first acceleration spi send: 0xa5 0000c350; // v1 = 50 000 acceleration threshold velocity v1 spi send: 0xa60000 0 1 f4 ; // amax = 500 acceleration above v1 spi send: 0xa700 030 d4 0 ; // vmax = 200 00 0 spi send: 0xa 8 0000 02bc ; // dmax = 7 00 deceleration above v1 spi send: 0xa a 0000 0578 ; // d1 = 1400 deceleration below v1 spi send: 0xa b 0000 0 00a ; // vstop = 10 stop velocity (near to zero) spi send: 0xa00000000 0 ; // rampmode = 0 ( t arget position move ) // ready to move! spi send: 0x adffff3800 ; // xtarget = - 51200 ( move one rotation left (200*256 microsteps ) // now motor 1 s tart s rotating spi send: 0x2100000000; // query xactual C the nex t read access delivers xactual spi read; // read xactual for uart based operation it is important to make sure that the crc byte is correct. the following example shows initialization for the driver with slave address 1 (nai pin high) . it programs the driver to spreadcycle mode and programs the motion controller for a constant velocity move and then read accesses the position and actual velocity registers: uart write: 0x05 0x0 1 0xec 0x00 0x 0 1 0x 00 0x c5 0x d3 ; // toff= 5 , hend= 1 , hstr= 4 , // tbl=2, mres=0, chm=0 uart write: 0x05 0x0 1 0x 9 0 0x00 0x 0 1 0x 14 0x 05 0x d8 ; // ihold=5, irun=20, iholddelay=1 uart write: 0x05 0x0 1 0x a6 0x00 0x0 0 0x1 3 0x 88 0x b4 ; // amax=5000 uart write: 0x05 0x0 1 0xa7 0x00 0x00 0x4e 0x20 0x 8 5; // vmax=20000 uart write: 0x05 0x0 1 0xa0 0x00 0x00 0x00 0x01 0x a 3; // rampmod e=1 (positive velocity) // now motor should start rotating uart write: 0x05 0x0 1 0x21 0x 6b ; // query xactual uart read 8 bytes; uart write: 0x05 0x0 1 0x22 0x 25 ; // query vactual uart read 8 bytes; hint t une the configuration parameters for your moto r and application for optimum performance.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 110 www.trinamic.com 26 standalone o peration for standalone operation, no spi interface is required to configure the tmc5130a . all pins with suffix cfg0 to cfg6 have a special meaning in this mode. they are evaluated using tristate det ection, in order to differentiate between ? cfg pin tied to gnd ? cfg pin open (no connection) ? cfg pin tied to vcc_io figure 26 . 1 standa lone operati o n with tmc 5130a (pins shown with their standalone mode names) to activate standalone mode, tie pin spi_mode to gnd. pin sd_mode can be left open (high) in this constellation. in this mode, the driver acts as a pure step and dir driver. spi and single wire are off. the driver works in spr eadcycle mode or stealthchop mode . with regard to the register set, the following settings are activated: gconf settings: gconf . diag0_error = 1: diag0 works in open drain mode and signals driver error. gconf . diag 1 _ index = 1: diag1 works in open drain m ode and signals microstep table index position. the following settings are affected by the cfg pins in order to ensure correct configuration: cfg0: s ets c hopper o ff t ime ( duration of slow dec ay phase ) cfg0 toff setting registers gnd 140 t clk (recommend ed, most universal choice) toff =4 vcc_io 236 t clk toff =7 open 332 t clk toff =10 v c c _ i o t m c 5 1 3 0 a s t e p & d i r i n p u t w i t h m i c r o p l y e r s t e p d i r 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p 2 2 n 6 3 v 1 0 0 n 1 6 v c l k _ i n + v m 5 v o u t v s a 4 . 7 + v i o g n d p g n d a t s t _ m o d e d i e p a d v c c o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n s e q u e n c e r f u l l b r i d g e a f u l l b r i d g e b + v m v s s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 1 0 0 n b r b 1 0 0 f c p i c p o b r a r s a u s e l o w i n d u c t i v i t y s m d t y p e , e . g . 1 2 0 6 , 0 . 5 w r s b 1 0 0 n v c p o p t i o n a l u s e l o w e r v o l t a g e d o w n t o 6 v 2 r 2 4 7 0 n d a c r e f e r e n c e a i n _ i r e f i r e f u s e l o w i n d u c t i v i t y s m d t y p e , e . g . 1 2 0 6 , 0 . 5 w s t a t u s o u t ( o p e n d r a i n ) c o n f i g u r a t i o n i n t e r f a c e w i t h t r i s t a t e d e t e c t i o n c f g 0 c f g 1 c f g 3 c f g 2 d i a g 0 d i a g 1 t r i s t a t e c o n f i g u r a t i o n ( g n d , v c c _ i o o r o p e n ) i n d e x p u l s e d r i v e r e r r o r c f g 4 c f g 5 d r v _ e n n _ c f g 6 o p t . d r i v e r e n a b l e i n p u t g n d d b . d w e r s t e g , ? t r i n a m i c 2 0 1 4 s d _ m o d e s p i _ m o d e l e a v e o p e n
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 111 www.trinamic.com cfg1 and cfg 2 : s ets m icrostep r esolution for step i nput cfg 2, cfg1 mic r ostep s interpolation chopper mode registers gnd, gnd 1 (fullstep) n spreadcycle mres =8, intpol =0 gnd, vcc_io 2 (halfstep) n mres =7, intpol =0 gnd, open 2 (halfstep) y, to 256 steps mres =7, intpol =1 vcc_io, gnd 4 (quarterstep) n mres =6, intpol =0 vcc_io, vcc_io 16 steps n mres =4, intpol =0 vcc_io, open 4 (quarterstep) y, to 256 steps mres =6 , intpol =1 open, gnd 16 steps y, to 256 steps mres =4, intpol =1 open, vcc_io 4 (quarterstep) y, to 256 steps stealthchop mres=6, intpol = 1, e n_pwm_mode =1 open, open 16 steps y, to 256 steps mres=4, intpol =1, en_pwm_mode =1 cfg3: s ets m ode of c urrent s etting cfg3 current setting registers gnd internal reference voltage. current scale set by sense resistors, only. vcc_io internal sense resistors. use analog input current on ain as reference current for internal sense resistor . this setting gi ves best results when combined with stealthchop voltage pwm chopper. i nternal_rsense =1 open external reference voltage on pin ain. current scale set by sense resistors and scaled by ain. i_scale_analog =1 cfg4: s ets c hopper h ysteresis (t uning of z ero c ro ssing p recision ) cfg4 hend setting registers gnd 5 (recommended, most universal choice) hend = 7 vcc_io 9 hend =11 open 13 hend =15 cfg5 : s ets c hopper b lank t ime ( duration of blanking of switchin g spike ) cfg5 blank time (in number of clock cycles ) regis ters gnd 16 tbl = %00 vcc_io 24 (recommended, most universal choice) tbl = %01 o pen 36 tbl =%10
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 112 www.trinamic.com cfg6_enn : e nable p in and c onfiguration of s tandstill p ower d own cfg6 motor driver e nable standstill power down registers gnd enable n irun =31, ihold =31 vcc_i o disable - (driver disable) open enable y, ramp down from 100% to 34% motor current in 44m clock cycles (3 to 4 seconds) if no step pulse for more than 1m clock cycles (standstill) . in combination with stealthchop , be sure not to work with too low overa ll current setting, as regulation will not be able to measure the motor current after stand still current reduction. this will result in very low motor current after the stand - still period. irun =31, ihold =11, iholddelay =8 while the parameters for spreadc ycle can be configured for good microstep performance, stealthchop mode is configured with its power on default values ( pwmconf = 0x00050480 ) : f pwm = 2 /683 f clk (i.e. roughly 38 khz with internal clock) pwm_autoscale =1 pwm_grad =4 pwm_ampl =128 cfg0 and cfg4 se ttings do not influence the stealthchop configuration. this way, it is even possible to switch between spreadcycle and stealthchop mode by simply switching cfg1 and cfg2. hint be sure to allow the motor to rest for at least 100ms ( assuming a minimum of 1 0mhz f clk ) before starting a motion using stealthchop. this will allow the current regulation to set the initial motor current. example: it is desired to do small motions in smooth and noiseless stealthchop mode. for quick motions, spreadcycle is to be us ed. the controller can deliver 1/16 microstep step signals. tie together cfg1 and cfg2 and drive them with a three state driver. switch both to vcc_io to operate in spreadcycle, switch them to hi - z (open) state for a motion in stealthchop.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 113 www.trinamic.com 27 external r es et t he chip is loaded with default values during power on via its internal power - on reset . in order to reset the chip to power on defaults, any of the supply voltages monitored by internal reset circuitry (vsa, +5vout or vcc_io) must be cycled. vcc is not monitored. therefore vcc must not be switched off during operation of the chip. as +5vout is the output of the internal voltage regulator, it cannot be cycled via an external source except by cycling vsa. it is easiest and safest to cycle vcc_io in order t o completely reset the chip . also, current consumed from vcc_io is low and therefore it has simple driving requirements . due to the input protection diodes not allowing the digital inputs to rise above vcc_io level, all inputs must be driven low during thi s reset operation. when this is not possible, an input protection resistor may be used to limit current flowing into the related inputs . in case, vcc becomes supplied by an external source, make sure that vcc is at a stable value above the lower operatio n limit once the reset ends. this normally is satisfied when generating a 3.3v vcc_io from the +5v supply supplying the vcc pin, because it will then come up with a certain delay . 28 clock oscillator and input the clock is the timing reference for all funct ions: the chopper, the velocity, the acceleration control, etc. many parameters are scaled with the clock frequency, thus a precise reference allows a more deterministic result. the on - chip clock oscillator provides timing in case no external clock is easi ly available. 28.1 using the internal clock directly tie the clk input to gnd near to the ic if the internal clock oscillator is to be used. the internal clock can be calibrated by driving the ramp generator at a certain velocity setting. reading out position values via the interface and comparing the resulting velocity to the remote masters clock gives a time reference. a similar procedure also is described in 19.5 . for a step/dir application, read out tstep at a d efined external step frequency. s cal e acceleration and velocity settings , toff and pwm_freq as a result. t emperature dependency and ageing of the internal clock is comparatively low. i mplementing f requency d epend e nt s caling frequency dependent scaling all ows using the internal clock for a motion control application. the time reference of the external microcontroller is used to calculate a scaler for all velocity settings . the following steps are required: 1. y ou may leave the motor driver disabled during the calibration. 2. start motor in velocity mode, with vmax =10000 and amax =60000 ( for quick acceleration). the a cceleration phase is ended after a few ms. 3. read out xactual twice, at time point t1 and time point t2, e.g. 100ms later (dt=0.1s). the time difference between both read accesses shall be exactly timed by the external microcontroller. 4. stop the motion ramp by setting vmax =0 . 5. the number of steps done in between of t1 and t2 now can be used to calculat e the factor ? = ???? ? ?? ??????? ( ? 2 ) ? ??????? ( ? 1 ) = 1000 ??????? ( ? 2 ) ? ??????? ( ? 1 ) 6. n ow multiply each velocity value with this factor f , to normalize t he velocity to steps per second. at a nominal value of the internal clock frequ ency, 780 steps will be done in 100ms. hint in case well defined velocity settings and precise motor chopper operation are desired, it is supposed to work with an external clock source.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 114 www.trinamic.com 28.2 using an external clock when an external clock is available, a freq uency of 1 0 mhz to 16 mhz is recommended for optimum performance. the duty cycle of the clock signal is uncritical, as long as minimum high or low input time for the pin is satisfied (refer to electrical characteristics). up to 18 mhz can be used, when the clock duty cycle is 50%. make sure, that the clock source supplies clean cmos output logic levels and steep slopes when using a high clock frequency. the external clock input is enabled with the first positive polarity seen on the clk input. attention switching of f the external clock frequency prevents the driver from operating normally. therefore be careful to switch off the motor drivers before switching off the clock (e.g. using the enable input), because otherwise the chopper would stop and the motor current le vel could rise uncontrolled. the short to gnd detection stays active even without clock, if enabled. 28.3 considerations on the frequency a higher frequency allows faster step rates, faster spi operation and higher chopper frequencies. on the other hand, it may cause more electromagnetic emission of the system and causes more power dissipation in the tmc 5130a digital core and voltage regulator. generally a frequency of 1 0 mhz to 16 mhz should be sufficient for most applications. for reduced requirements concerning the motor dynamics, a clock frequency of down to 8 mhz (or even lower) can be considered.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 115 www.trinamic.com 29 absolute maximum ratings the maximum ratings may not be exceeded under any circumstances. operating the circuit at or near more than one maximum rating at a time for extended periods shall be avoided by application design. parameter symbol min max unit supply voltage operating with inductive load ( v vs vs a ) v vs , v vs a - 0. 5 49 v supply and bridge voltage max. *) v vmax 50 v vsa when different from to vs v vs a - 0.5 v vs + 0.5 v i/o supply voltage v vio - 0.5 5.5 v digital vcc supply voltage (if not supplied by internal regulator) v vcc - 0.5 5.5 v logic input voltage v i - 0.5 v v io +0.5 v maximum current to / from digital pins and analog low voltage i/os i io +/ - 10 ma 5v regulator output current (internal plus external load) i 5vout 50 ma 5v regulator continuous power dissipation (v vm - 5v) * i 5vout p 5vout 1 w power b ridge repe titive output current i ox 3.0 a junction temperature t j - 50 150 c storage temperature t stg - 55 150 c esd - protection for interface pins (human body model, hbm) v esdap 4 kv esd - protection for handling (human body model, hbm) v esd 1 kv *) stray ind uctivity of gnd and vs connections will lead to ringing of the supply voltage when driving an inductive load. this ringing results from the fast switching slopes of the driver outputs in combination with reverse recovery of the body diodes of the output dr iver mosfets. even small trace inductivities as well as stray inductivity of sense resistors can easily generate a few volts of ringing leading to temporary voltage overshoot . this should be considered when working near the maximum voltage. 30 electrical ch aracteristics 30.1 operational range parameter symbol min max unit junction temperature t j - 40 125 c s upply voltage (using internal +5v regulator) v vs , v vs a 5.5 4 6 v supply voltage (internal +5v regulator bridged: v vcc =v vsa =v vs ) v vs 4.7 5.4 v i/o supply vo ltage v vio 3.00 5.25 v vcc voltage when using optional external source (supplies digital logic and charge pump) v vcc 4. 6 5.25 v rms motor coil current per coil (value for design guideline) i rms 1.4 a peak output current per motor coil output (sine wav e peak) using external or internal current sensing i ox 2.0 a peak output current per motor coil output (sine wave peak) for short term operation . limit t j 1 0 5c , e.g. for 100ms short time acceleration phase below 50% duty cycl e . i ox 2 . 5 a
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 116 www.trinamic.com 30.2 dc and timing characteristics dc characteristics contain the spread of values guaranteed within the specified supply voltage range unless otherwise specified. typic al values represent the average value of all parts measured at +25c. temperature variation also causes stray to some values. a device with typical values will not leave min/max range within the full temperature range. power supply current dc - characterist ics v vs = v vs a = 24.0v parameter symbol conditions min typ max unit total s upply current, driver disabled i vs + i vs a + i vcc i s f clk =16mhz 15 2 2 ma total s upply current, operating , i vs + i vs a + i vcc i s f clk =16mhz, 23.4 khz chopper , no load 1 9 ma idle supply current from v s , charge pump operating i vs0 f clk =0hz , driver disable d 0.25 0.5 ma s tatic supply current from vsa with vcc supplied by 5vout i vs a 0 f clk =0hz , includes vcc supply current 1 .4 2 3 ma supply current, driver disabled, dependency on clk frequency i vccx f clk variable, additional to i vs a 0 0.8 ma/mhz internal current consumption from 5v supply on vcc pin i vcc f clk =16mhz, 23.4 khz chopper 16 ma io supply current (typ. at 5 v) i vio no load on outputs, inputs at v io or gnd excludes pullup / pull - down resistors 1 5 30 a motor driver section dc - and timing - characteristics v vs = 24.0v parameter symbol conditions min typ max unit rds on lowside mosfet r onl measure at 100ma, 25c, static state 0.4 0.5 ? on highside mosfet r onh measure at 100ma, 25c, static state 0.5 0.6 ? slpon measured at 700ma load current (resistive load) 50 1 2 0 2 2 0 ns slope, mosfet turning off t slpoff measured at 700ma load current (resistive load) 50 120 2 2 0 ns current sourcing, drive r off i oidle o xx pulled to gnd 120 180 250 a charge pump dc - characteristics parameter symbol conditions min typ max unit charge pump output voltage v vcp - v vs operating, typical f chop <40khz 4.0 v vcc - 0. 3 v vcc v charge pump voltage threshold for undervo ltage detection v vcp - v vs using internal 5v regulator voltage 3.3 3.6 3.8 v charge pump frequency f cp 1/16 f clkosc
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 117 www.trinamic.com linear regulator dc - characteristics v vs = v vs a = 24.0v parameter symbol conditions min typ max unit output voltage v 5vout i 5vout = 0m a t j = 25c 4. 80 5.0 5.25 v output resistance r 5vout static load 3 ? 5vout(dev) i 5vout = 16 ma t j = full range +/ - 30 +/ - 100 mv deviation of output voltage over the full supply voltage range v 5vout(dev) i 5vout = 0 ma v vsa = variable +/ - 15 +/ - 30 mv / 10v deviation of output voltage over the full supply voltage range v 5vout(dev) i 5vout = 16 ma v vs a = variable - 38 +/ - 75 mv / 10v clock oscillator and input timing - characteristics parameter s ymbol conditions min typ max unit clock oscillator frequency f clkosc t j = - 50c 9 12.4 mhz clock oscillator frequency f clkosc t j =50c 10 .1 13.2 1 7 .2 mhz clock oscillator frequency f clkosc t j =150c 13.4 18 mhz external clock frequency (operating) f clk 4 1 0 - 16 18 mhz external clock high / low level time t clk h / t clk l clk driven to 0.1 v vio / 0.9 v vio 10 n s external clock first cycle triggering switching to external clock source t clk h1 clk d riven high 30 25 ns detector levels dc - characteristics parameter symbol conditions min typ max unit v vs a undervoltage threshold for reset v uv _vs a v vs a rising 3.8 4.2 4.6 v v 5vout undervoltage threshold for reset v uv _5vout v 5vout rising 3.5 v v vcc_io undervoltage threshold for reset v uv _vio v vcc_io rising (delay typ. 10s) 2.1 2.55 3.0 v v vcc_io undervoltage detector hysteresis v uv _viohyst 0.3 v short to gnd detector threshold (v vs - v ox ) v os2g 2 2. 5 3 v short to gnd detector delay (high side switch on to short detected) t s2g high side output clamped to v sp - 3v 0.8 1.3 2 s overtemperature prewarning t otpw temperature rising 100 120 140 c overtemperature shutdown t ot temperature rising 135 150 170 c
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 118 www.trinamic.com sense resistor voltage levels dc - characteristics f clk =16mhz parameter symbol conditions min typ m ax unit sense input peak threshold voltage (low sensitivity) v srtl vsense =0 csactual =31 sin_x =248 hyst.=0; i brxy =0 325 mv s ense input peak threshold voltage (high sensitivity) v srth vsense =1 csactual =31 sin_x =248 hyst.=0; i brxy =0 180 mv sense input tolerance / motor current full scale tolerance - using internal reference i coil i_scale_analog =0, vsense =0 - 5 +5 % sense input tolerance / motor current full scale tolerance - using external reference voltage i coil i_scale_analog =1, v ain =2 v, vsense =0 - 2 +2 % internal resistance from pin brxy to internal sense comparator (additional to sense resistor) r brxy 20 m? digital pins dc - characteristics parameter symbol conditions min typ max unit input voltage low level v inlo - 0.3 0.3 v vio v input vol tage high level v inhi 0.7 v vio v vio +0.3 v input schmitt trigger hysteresis v inhyst 0.12 v vio v output voltage low level v outlo i outlo = 2ma 0.2 v output voltage high level v outhi i outhi = - 2ma v vio - 0.2 v input leakage current i ileak - 10 10 a pullup / pull - down resistors r pu /r pd 132 166 200 k? ain/iref input dc - characteristics parameter symbol conditions min typ max unit ain _iref i nput resistance to 2.5v (= 5vout/2 ) r ain measured to gnd ( internalrsense =0) 260 330 400 k? ain measured to gnd ( iscaleanalog =1) 0 0.5 - 2.4 v 5vout /2 v ain _iref open i nput voltage level v ain o open circuit voltage ( internalrsense =0) v 5vout /2 v ain_iref i nput resistance to gnd for reference current input r iref measured to gnd ( internalrsense =1) 0.8 1 1. 2 k? refamp l i iref = 0.25 ma 3000 t imes motor current full scale tolerance - using rdson measurement i coil internal_rsense =1, vsense =0 , i iref = 0.25ma - 10 + 10 %
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 119 www.trinamic.com 30.3 th ermal characteristics the following table shall give an idea on the thermal resistance of the package. the thermal resistance for a four layer board will provide a good idea on a typical application. actual thermal characteristics will depend on the pcb la yout, pcb type and pcb size. the thermal resistance will benefit from thicker cu (inner) layers for spreading heat horizontally within the pcb. also, air flow will reduce thermal resistance. a thermal resistance of 2 1 k /w for a typical board means, that th e package is capab le of continuously dissipating 4 . 7 w at an ambient temperature of 25c with the die temperature staying below 125c. parameter symbol conditions typ unit typical power dissipation p d stealthchop or spreadcycle, 1a rms in two phase motor, sinewave, 40 or 20khz chopper, 24v, internal supply, 85c peak surface of package (motor qsh4218 - 035 - 10 - 027) 3.0 w thermal resistance junction to ambient on a multilayer board r tmja dual signal and two internal power plane board (2s2p) as defined in jede c eia jesd51 - 5 and jesd51 - 7 (fr4, 35m cu, 70mm x 133mm, d=1.5mm) 2 1 k/w thermal resistance junction to board r tjb pcb temperature measured within 1mm distance to the package leads 8 k/w thermal resistance junction to case r tjc junction temperature to h eat slug of package 3 k/w table 30 . 1 thermal characteristics tqfp48 - ep the thermal resistance in an actual layout can be tested by checking for the heat up caused by the standby power consumption of the chip. when no motor is attached, all power seen on the power supply is dissipated within the chip. note a spread - sheet for calculating tmc5 130 power dissipation is available on www.trinamic.com.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 120 www.trinamic.com 31 layout considerations 31.1 exposed die pad the tmc 5130a uses its di e attach pad to dissipate heat from the drivers and the linear regulator to the board. for best electrical and thermal performance, use a reasonable amount of solid, thermally conducting vias between the die attach pad and the ground plane . the printed cir cuit board should have a solid ground plane spreading heat into the board and providing for a stable gnd reference. 31.2 wiring gnd all signals of the tmc 5130a are referenced to their respective gnd. directly connect all gnd pins under the device to a common g round area (gnd, gndp, gnda and die attach pad). the gnd plane right below the die attach pad should be treated as a virtual star point. for thermal reasons, the pcb top layer shall be connected to a large pcb gnd plane spreading heat within the pcb . att ention especially the sense resistors are susceptible to gnd differences and gnd ripple voltage, as the microstep current steps make up for voltages down to 0.5 mv. no current other than the sense resistor current should flow on their connections to gnd an d to the tmc 5130a . optimally place them close to the ic , with one or more vias to the gnd plane for each sense resistor. the two sense resistors for one coil should not share a common ground connection trace or vias, as also pcb traces have a certain resis tance. 31.3 supply filtering the 5vout output voltage ceramic filtering capacitor (4.7 f recommended) should be placed as close as possible to the 5vout pin, with its gnd return going directly to the gnda pin . this ground connection shall not be shared with other loads or additional vias to the gnd plan . use as short and as thick connectio ns as possible. for best microstepping performance and lowest chopper noise an additional filtering capacitor should be used for the vcc pin to gnd, to avoid charge pump and digital part ripple influencing motor current regulation. therefore place a cerami c filtering capacitor (470nf recommended) as close as possible (1 - 2mm distance) to the vcc pin with gnd return going to the ground plane. vcc can be coupled to 5vout using a 2.2 ? or 3.3 ? resistor in order to supply the digital logic from 5vout while keep ing ripple away from this pin. a 100 nf filtering capacitor should be placed as close as possible to the vsa pin to ground p lane. the motor supply pins vs should be decoupled with an electrolytic capacitor (47 f or larger is recommended) and a ceramic ca pacitor, placed close to the device. take into account that the switching motor coil outputs have a high dv/dt. t hus capacitive stray into high resistive signals can occur, if the motor traces are near other traces over longer distances.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 121 www.trinamic.com 31.4 layout e xampl e s chematic 1 - top l ayer (assembly side) 2 - inner l ayer (gnd)
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 122 www.trinamic.com 3 - inner l ayer (supply vs) 4 - bottom l ayer c omponents f igure 31 . 1 layout example
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 123 www.trinamic.com 32 package mechanical data all length units are given in m illimeters. 32.1 dimensional drawing s tqfp48 - ep attention: drawings not to scale. f igure 32 . 1 dimensional drawings tqfp48 - ep
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 124 www.trinamic.com p arameter ref min nom max total thickness a - - 1.2 stand off a1 0.0 5 - 0. 1 5 mold thickness a2 0.95 1 1.05 lead width (plating) b 0. 17 0.2 2 0. 27 lead width b1 0. 17 0. 2 0. 2 3 lead frame thickness (plating) c 0.09 - 0.2 lead frame thickness c1 0.09 - 0.16 body size x (over pins) d 9 .0 body size y (over pins) e 9 .0 body size x d 1 7 .0 body size y e 1 7 .0 lead pitch e 0.5 lead l 0. 4 5 0. 6 0. 75 footprint l1 1 ref ? ? ? ? 32.2 package c odes type package temperature range code & marking tmc 5130a - ta tqfp - ep48 (rohs) - 40c ... +125c tmc 5130a - ta
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 125 www.trinamic.com 33 design philosophy we feel that this is one of the coolest chips which we di d within the last years. the tmc50xx and tmc5130 family brings premium functionality, reliability and coherence previously reserved to costly motion control units to smart applications . integration at street level cost was possible by squeezing know - how in to a few mm2 of layout using one of the most modern smart power processes. the ic comprises all the knowledge gained from designing motion control ler and driver chips and complex motion control systems for more than 20 years. we are often asked if our moti on controllers contain software C they definitely do not. the reason is that sharing resources in software leads to complex timing constraints and can create interrelations between parts which should not be related. this makes debugging of software so diff icult. therefore, the ic is completely designed as a hardware solution, i.e. each internal calculation uses a specially designed dedicated arithmetic unit. the basic philosophy is to integrate all real - time critical functionality in hardware, and to leave additional starting points for highest flexibility . parts of the design go back to previous ics, starting from the tmc453 motion controller developed in 1997. our deep involvement , practical testing and the stable team ensure a high level of co nfidence and functional safety. bernhard dwersteg, cto and founder 34 disclaimer trinamic motion control gmbh & co. kg does not authorize or warrant any of its products for use in life support systems, without the specific written consent of trinamic motion control gmb h & co. kg. life support systems are equipment intended to support or sustain life, and whose failure to perform, when properly used in accordance with instructions provided, can be reasonably expected to result in personal injury or death. information gi ven in this data sheet is believed to be accurate and reliable. however no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may result from its use. specifications are su bject to change without notice. all trademarks used are property of their respective owners. 35 esd sensitive device the tmc 5130a is an esd sensitive cmos device sensitive to electrostatic discharge. take special care to use adequate grounding of personnel and machines in manual handling. after soldering the devices to the board, esd requirements are more relaxed. failure to do so can result in defect or decreased reliability.
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 126 www.trinamic.com 36 table of f igures f igure 1.1 tmc5130a basic application bl ock diagram with mot ion controller ................................ ........................ 5 f igure 1.2 tmc5130a step/dir application diagram ................................ ................................ ................................ ...... 6 f ig ure 1.3 tmc5130a standalone driver ap plication diagram ................................ ................................ ....................... 6 f igure 1.4 e nergy efficiency wit h cool s tep ( example ) ................................ ................................ ................................ ...... 9 f igure 2.1 tmc5130 a - ta package and pinning tqfp - ep 48 (7 x 7 mm body , 9 x 9 mm with leads ) ............................... 10 f igure 3.1 s tandard application circuit ................................ ................................ ................................ ........................... 13 f igure 3.2 r educe d number of filterin g components ................................ ................................ ................................ ...... 14 f igure 3.3 rds on based sensing eli minates high current sense resistors ................................ ................................ .. 14 f igure 3.4 u sing an external 5v supply for digital c ircuitry of driver ( different options ) ................................ .. 15 f igure 3.5 u sing an external 5v supply to bypass int ernal regulator ................................ ................................ ........ 16 f igure 3.6 e xamples for simple p re - regulators ................................ ................................ ................................ ................ 16 f igure 3.7 5v only operation ................................ ................................ ................................ ................................ .............. 17 f igure 3.8 d erating of maximum s in e wave peak current at increased die tem perature ................................ ........... 18 f igure 3.9 s chottky diodes reduc e power dissipation at high peak current s up to 2a (2.5a) ................................ 19 f igure 3.10 s imple esd enhancement and more elaborate motor outp ut protection ................................ ................ 20 f igure 4.1 spi timing ................................ ................................ ................................ ................................ ............................ 23 f igure 5. 1 a ddressing multiple tmc5130a via single wire inte rface using chaining ................................ .............. 27 f igure 5.2 a ddressing multiple tmc5130a via the differential interface , additional filtering for nai ............ 28 f igure 7.1 m otor coil sine wave current with stealth c hop ( measured with curren t probe ) ................................ .. 51 f igure 7.2 s cope shot : good setting for pwm_grad ................................ ................................ ................................ .... 52 f igure 7.3 s cope shot : too small setting fo r pwm_grad ................................ ................................ ............................ 52 f igure 7.4 g ood and too small se tting for pwm_grad ................................ ................................ .............................. 53 f igure 7.5 v elocity based pwm scaling ( pwm _ autoscale =0) ................................ ................................ ......................... 55 f igure 8.1 c hopper phases ................................ ................................ ................................ ................................ ................... 59 f igure 8.2 n o ledges in current wave with sufficient hysteresis ( magenta : current a, yellow & blue : sense resistor voltages a and b) ................................ ................................ ................................ ................................ ......... 61 f igure 8.3 spread c ycle chopper scheme showing coil curren t during a chopper c ycle ................................ ............ 62 f igure 8.4 c lassic const . off time chopper wit h offset showing coi l current ................................ .......................... 63 f igure 8.5 z ero crossin g with classic chopp er and correction us ing sine wave offset ................................ .......... 63 f igure 9.1 s caling the motor cur rent using the analo g input ................................ ................................ ...................... 66 f ig ure 12.1 c hoice of velocity de pendent modes ................................ ................................ ................................ ............. 71 f igure 14.1 r amp generator veloci ty trace showing con sequent move in nega tive direction ................................ 75 f igure 14.2 i llustration of optim ized motor torque us age with tmc5130a ramp generator ................................ 76 f igure 14.3 r amp generator veloci ty dependent motor c ontrol ................................ ................................ ................... 77 f igure 14.4 u sing reference switc hes ( example ) ................................ ................................ ................................ .............. 78 f igure 15.1 f unction principle of stall g uard 2 ................................ ................................ ................................ ............... 80 f igure 15.2 e xample : optimum sgt setting and stall g uard 2 reading with an exam ple motor ................................ 82 f igure 16.1 cool s tep adapts motor cur rent to the load ................................ ................................ ............................... 85 f igure 17.1 step and dir timing , i nput pin filter ................................ ................................ ................................ ......... 87 f igure 17.2 micro p lyer microstep inter polation with rising step frequency (e xample : 16 to 256) ...................... 89 f igure 18.1 diag outputs in step/dir mode ................................ ................................ ................................ .................. 90 f igure 18.2 diag outputs with sd_mode=0 ................................ ................................ ................................ ................... 91 f igur e 19.1 dc s tep extended applica tion operation area ................................ ................................ ............................... 9 2 f igure 19.2 v elocity profile with impact by overload s ituation ................................ ................................ ................. 93 f igure 19.3 m otor moving slower t han step input due to light o verload . loststeps incremented .................. 96 f igure 19.4 f ull signal interconn ection for dc s tep ................................ ................................ ................................ ...... 96 f igure 19.5 dco i nterface to motion c ontroller C step generator stops when dco is asserted .......................... 97 f igure 20.1 lut programming example ................................ ................................ ................................ .............................. 98 f igure 22.1 o utline of abn signals of an increm ental encoder ................................ ................................ ................ 100 f igure 24.1 c urrent setting and f irst steps with stea lth c hop ................................ ................................ ................... 104 f igure 24.2 t uning stealth c hop and spread c ycle ................................ ................................ ................................ ......... 105 f igure 24.3 m oving the motor usin g the motion control ler ................................ ................................ ....................... 106 f igure 24.4 e nabling cool s tep ( only in combination with spread c ycle ) ................................ ................................ .. 107 f igure 24.5 s etting up dc s tep ................................ ................................ ................................ ................................ ........... 108
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 127 www.trinamic.com f igure 26.1 s tandalone operat ion with tmc5130a ( pins shown with thei r standalone mode na mes ) ............... 110 f igure 31.1 l ayout example ................................ ................................ ................................ ................................ ............... 122 f igure 32.1 d imensional drawing s tqfp48 - ep ................................ ................................ ................................ ............. 123
tmc5130 a datasheet (rev. 1 . 1 4 / 201 7 - may - 15 ) 128 www.trinamic.com 37 revision history version date author bd= bernhard dwersteg sd= sonja dwersteg description v0 . 25 2014 - jan - 31 bd adaptation to pre - series silicon v0 . 38 2014 - mar - 25 bd value corrections in conjunction with test program clock frequency range , conditions for limiting values limits for deviation of motor current added hint for highest motor velocities v0.42 2014 - jun - 2 6 sd front page and page 2 new. changes related to the design. few chapters reorganized. v0.44 2014 - jul - 15 sd principles of operation updated. spi datagram structure updated. v0.46 2014 - sep - 11 sd product name changed. v1.00 2014 - oct - 13 sd full version for release , corrected typos, etc. v1.01 2014 - nov - 03 bd corrected sense resistor table cu rrent values v1.02 2014 - dec - 01 bd wording thermal shutdown , encoder if , hints for mode switching in chapter 1. added text in 14.4 and 14.5. v1.03 2014 - dec - 05 bd stallguard stop details: improved homing algorithm in 14.4, added 15.4, t ext f o r event_stop_s g , improved 19.4 v1.04 2014 - dec - 11 bd pin table formatting, some comments, clk info in emergency stop chapter, numbering for homing procedure, comment in 15.4 for event_stop_sg v1.05 2015 - jan - 19 bd added design philosophy, added references, minor wording corrections , example with stealthchop v1.06 2015 - feb - 12 bd added chapter closing the loop. added uart interface errata. v1.08 2015 - feb - 24 bd improved an links, dcstep description & flowchart, blue blocks v1.09 2015 - mar - 10 bd added fstep in 14.1 , rename d register tzerocross to tzerowait and register t zerowait to t powerdown for consistency. v1.10 2015 - apr - 21 bd more details on dc motor operation, shifted chapter 7.3.1 to 7.2.2 v1.11 2015 - oct - 08 bd some typos ( ramp_stat , position_reached , sfilt ); added t clk spec for first clock event , 20.2 swapped x1 and x3, corr. example in 4.1.1, spi mode 3 hint , toff calculation 8.1 , fclk measurement for s/d , gstat explanations added v1.12 2016 - apr - 22 bd more details on: setting negative encoder factors, stealthchop l ower current limit , ramp generator joystick control, terminate ramp , homing with a third switch , pin list with regard to mode , adaptation to internal fclk corrected: e ffective stealthchop pwm frequency is 2* divider setting , wording v1 and vmax register , di ag output schematic , esd schematic w. varistors instead of snubber v1.13 2016 - sep - 21 bd hint for index pulse, new changing resolution table, some wording v1.14 2017 - may - 15 bd minor details, senddelay>=2 for multi - slave systems table 37 . 1 document revisions 38 references [tmc5 130 - eval] tmc5 130 - eval manual [an001] trinamic application note 001 - parameterization of spreadcycle?, www.trinamic.com [an002] trinamic applicatio n note 002 - parameterization of stallguard2? & coolstep?, www.trinamic.com [an0 03 ] trinamic application note 0 03 - dc step? , www.trinamic.com cal culation sheet tmc5130_tmc2130 _tmc2100_calculations.xlsx , www.trinamic.com

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